CRC32 implementation on Sandy Bridge

[amdn]

On Nehalem the SSE4.2 CRC32 instruction is executed on the ALU that handles complex integer, dispatched through port 1. This is also the port through which Floating Point addition is dispatched. Is this still the case for Sandy Bridge? In the following micro-architectural diagram there is no distinction between the ALUs on ports 0,1, and 5:

http://www.hardwaresecrets.com/fullimage.php?image=30986

Is it still the case that only the ALU on port-1 can execute CRC32?

[Thomas_W_Intel]

You can find a description of the Sandy Bridge execution ports in 2.1.4 of the updated Intel 64 and IA-32 Architectures Optimization Reference Manual. It still lists integer multiplication and FP addition on port 1.