I think you may be tripped up by your interpretation of the statement "APIC are memory mapped devices".
The more accurate way to describe it may be "memory-mapped I/O (operation) is the programming interface to access APIC registers".
The operation of writing a dword to the physical address that maps to an APIC register does not cause the data to latch onto the bus or update into physical DRAM devices.
local APIC is not a piece of hardware shared by multiple logical processors, each logical processor has its own local APIC. Constrast that with physical memory, which is shared by multiple processors.
Take a look at the basic diagram in chapter 2 of volume 1 of the software developer's manual, fig 2-6 and 2-7, for example. In figure 2-8, there is not enough space to showeach local apicexplicitly, but each of the 8 logical processors has its own local APIC.