Intel® Moderncode for Parallel Architectures
Support for developing parallel programming applications on Intel® Architecture.

MONITOR/MWAIT scope for a user-level thread engine


Dear Forum,

Currently working on a user-level thread engine, I'm wondering up to which level Intel's processor MONITOR/MWAIT feature can be used in user-space.

After reading the documentation, I've checked if the MONITOR/MWAIT support is enabled through CPUID:ECX[5]  and MSR[0x1A0h] at bit 18 (both set to 1). Indeed, I was able to use monitor & mwait instructions through a kernel module. But when I want to call these instructions in a user-space application (CPL > 0), a SIGILL is triggered.

I've tried the aforementioned approach on two architectures:

  • Intel(R) Core(TM) i7-4790 CPU
  • Intel(R) Xeon Phi(TM) CPU 7250 (KNL) (kernel module not tested by lack of privileges for now)

I read in KNL just recently permitted users to execute such instructions in ring3. Does this mean that it is not possible to use it elsewhere (no-KNL architectures, user-mode privileges) or is it strictly limited to KNL architecture ?

Thanks in advance for your help,



0 Kudos
2 Replies
Black Belt

Volume 2 of the Intel Architectures Software Developer's Manual (Intel document 325383-059) says clearly that both the MONITOR and MWAIT instructions can only be executed at privilege level 0, and will generate an invalid-opcode exception if executed at any other privilege level.

The user-mode MONITOR/MWAIT extension for Xeon Phi x200 applies only to the Xeon Phi x200.  Obviously this may change in the future, but a mechanism to enable user-mode MONITOR/MWAIT on other processors has not been disclosed.


Thank you very much for this explanation and the clarification of where it can be used. Since then, machine admins have enabled this feature on KNLs, and everything is now working properly.