when load the segment register in real address mode or v86 mode , will it also change the hidden part of the segment register (the base address part and the limit part) ?

[nofaiture]

I am now reading theArchitectures Software Developer's Manual volume 3 , 9.1.4 First Instruction Executed

in this section , the wors " base address" appear many times. Because it means the "hidden base addres part of the segment register " when first appears. So , I think "base address" in this section means the "hidden base address part of the segment register".

If I amright , this section expresses that :

1, even in real address mode , when needed to access data ina segment ,cpuwill get the base addres of the segment from the hidden base address part of the segment register .

2, When load a selectorinto a segment register , cpu will compute the base address and put it in the hidden base address part of the segment register.

but after reset , the hidden base part is loaded with FFFF0000H, so , the first instruction to be executed is located at FFFFFFF0H.

Am I right? but in the volume 2A , when describes the LDS/LES/LFS/LGS/LSS instructions , it says that only in protected mode , these instructions will change the hidden parts of the segment register.

why?

[jimdempseyatthecove]

Short description:

The nomenclature CS, SS, DS,ES, FS, and GS refer to either Segment Registers (Real Mode or V86 Mode) or to Selectors (Protected Mode)

In both modes, referencing a virtualaddress relative to CS, SS, DS,ES, FS, and GS (either explicitly or implicitly),results in the virtual address being modified by use of the Segment Descriptor associated with CS, SS, DS,ES, FS, and GS to produce a Physical Address (or Protection Fault).

When CS, SS, DS,ES, FS, or GS is loaded in Protected Mode then a new Segment Descriptor for the specified segment registeris loaded from the Descriptor Table (or fault if none).

When CS, SS, DS,ES, FS, or GS is loaded in Real Mode or V86 Mode the processor does NOT load a new Segment Descriptor for the specified segment register. However, the 16-bit value gets loaded into a register for use in later virtual to physical address calculations.

When referencing a Virtual Memory address in all modes one of CS, SS, DS,ES, FS, or GS is either explicitly or implicitly involved and the appropriate currentSegment Descriptor for CS, SS, DS,ES, FS, or GSis involved in the address calculation. The behavior varies depending on the mode

Real Mode or Virtual 86 mode

The contents of the (Segment Register << 4+ Offset Supplied + Base Address of Selector associated with Segment Register )
Note, if in V86 mode there is a 1MB limit on (Segment Register << 4+ Offset Supplied)
If in Real Mode AND if the granularity of the Selector associated with the Segment Register is small then this too has a 1MB limit on (Segment Register << 4+ Offset Supplied)
If in Real Mode AND if the granularity of the Selector associated with the Segment Register is large then this too has a 4GB limit on (Segment Register << 4+ Offset Supplied)

Protected Mode

The effective address is Offset Supplied + Base Address of Selector associated with Segment Register but the contents of the Segment Register are not included in the address calculation.

There are other variants for 278 compatibility mode.

The important point is the processor always uses the(last loaded) segment descriptorassociated with the segment register

Jim Dempsey