ALT_SLD_FAB error

[Altera_Forum]

edit: I solved the problem. I changed the operating system language of my computer from Turkish to English and it worked. 

  Hello,   I have been using Quartus Prime 17.0v. When I compile DE1_SoC_SDRAM_Nios_Test project, it gives following errors.  Error (11176): Set_instance_parameter_value: There is no parameter named DESIGN_HASH on instance alt_sld_fab Error (11176): Alt_sld_fab.: version not allowed for EModuleProperty, must be in {[DESCRIPTION, NAME, VERSION, MODULE_TCL_FILE, MODULE_DIRECTORY, INTERNAL, HIDE_FROM_SOPC, HIDE_FROM_QSYS, HIDE_FROM_QUARTUS, OPAQUE_ADDRESS_MAP, GROUP, AUTHOR, ICON_PATH, DISPLAY_NAME, DATASHEET_URL, TOP_LEVEL_HDL_FILE, TOP_LEVEL_HDL_MODULE, INSTANTIATE_IN_SYSTEM_MODULE, EDITABLE, VALIDATION_CALLBACK, EDITOR_CALLBACK, ELABORATION_CALLBACK, GENERATION_CALLBACK, COMPOSITION_CALLBACK, PARAMETER_UPGRADE_CALLBACK, OUTDATED_IP_FILE, ANALYZE_HDL, STATIC_TOP_LEVEL_MODULE_NAME, FIX_110_VIP_PATH, SUPPORTED_DEVICE_FAMILIES, REPORT_TO_TALKBACK, ALLOW_GREYBOX_GENERATION, SUPPRESS_WARNINGS, STRUCTURAL_COMPOSITION_CALLBACK, NATIVE_INTERPRETER, PREFERRED_SIMULATION_LANGUAGE, REPORT_HIERARCHY, UPGRADEABLE_FROM]} Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub" Error: Quartus Prime Analysis & Synthesis was unsuccessful. 3 errors, 32 warnings  Error: Peak virtual memory: 883 megabytes  Error: Processing ended: Fri Mar 02 17:26:26 2018  Error: Elapsed time: 00:00:52  Error: Total CPU time (on all processors): 00:01:22 Error (293001): Quartus Prime Full Compilation was unsuccessful. 5 errors, 32 warnings  As I read on Altera's support for these features SignalTap™ II Logic AnalyzerIn-System Memory Content EditorLogic Analyzer InterfaceNios® II JTAG UARTNios II On-Chip Debugging (OCD) quartus using sld_hub file and I'm using 2 of them.  For this error Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub" support says delete ./megafunction folder in archive but I cant find this folder in project. This folder is in Quartus Library. I think there is problem in ALT_SLD_FAB files but I can not solve the problem yet. I would be glad, if you help.

[Altera_Forum]

I think this is a dead forum. I had the same issues last year and posted the same question here, no helpful answers so far... I would be glad to know if you ever solve this problem. 

    --- Quote Start ---  Hello,   I have been using Quartus Prime 17.0v. When I compile DE1_SoC_SDRAM_Nios_Test project, it gives following errors.  Error (11176): Set_instance_parameter_value: There is no parameter named DESIGN_HASH on instance alt_sld_fab Error (11176): Alt_sld_fab.: version not allowed for EModuleProperty, must be in {[DESCRIPTION, NAME, VERSION, MODULE_TCL_FILE, MODULE_DIRECTORY, INTERNAL, HIDE_FROM_SOPC, HIDE_FROM_QSYS, HIDE_FROM_QUARTUS, OPAQUE_ADDRESS_MAP, GROUP, AUTHOR, ICON_PATH, DISPLAY_NAME, DATASHEET_URL, TOP_LEVEL_HDL_FILE, TOP_LEVEL_HDL_MODULE, INSTANTIATE_IN_SYSTEM_MODULE, EDITABLE, VALIDATION_CALLBACK, EDITOR_CALLBACK, ELABORATION_CALLBACK, GENERATION_CALLBACK, COMPOSITION_CALLBACK, PARAMETER_UPGRADE_CALLBACK, OUTDATED_IP_FILE, ANALYZE_HDL, STATIC_TOP_LEVEL_MODULE_NAME, FIX_110_VIP_PATH, SUPPORTED_DEVICE_FAMILIES, REPORT_TO_TALKBACK, ALLOW_GREYBOX_GENERATION, SUPPRESS_WARNINGS, STRUCTURAL_COMPOSITION_CALLBACK, NATIVE_INTERPRETER, PREFERRED_SIMULATION_LANGUAGE, REPORT_HIERARCHY, UPGRADEABLE_FROM]} Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub" Error: Quartus Prime Analysis & Synthesis was unsuccessful. 3 errors, 32 warnings  Error: Peak virtual memory: 883 megabytes  Error: Processing ended: Fri Mar 02 17:26:26 2018  Error: Elapsed time: 00:00:52  Error: Total CPU time (on all processors): 00:01:22 Error (293001): Quartus Prime Full Compilation was unsuccessful. 5 errors, 32 warnings  As I read on Altera's support for these features SignalTap™ II Logic AnalyzerIn-System Memory Content EditorLogic Analyzer InterfaceNios® II JTAG UARTNios II On-Chip Debugging (OCD) quartus using sld_hub file and I'm using 2 of them.  For this error Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub" support says delete ./megafunction folder in archive but I cant find this folder in project. This folder is in Quartus Library. I think there is problem in ALT_SLD_FAB files but I can not solve the problem yet. I would be glad, if you help.  --- Quote End ---  

[Altera_Forum]

--- Quote Start ---  I think this is a dead forum. I had the same issues last year and posted the same question here, no helpful answers so far... I would be glad to know if you ever solve this problem.  --- Quote End ---    What is your operating system language?

[kozka]

ı have same problem and ı dont know what ı do

[johnnyfan1979]

Maybe you can check the Environment Variables of the "IP_ROOTDIR".
Make sure it is set to the correct Quartus path on your host such as IP_ROOTDIR=F:\intelFPGA\20.1\ip