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Hello All,
I am trying to simulate Altera_soft_LVDS megafunction using external PLL using ALTPLL megafunction. If I start simulation in Modelsim tool I am getting this type of errors in transcript # ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(110): Unresolved defparam reference to 'altpll_component' in altpll_component.bandwidth_type.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(111): Unresolved defparam reference to 'altpll_component' in altpll_component.clk0_divide_by.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(112): Unresolved defparam reference to 'altpll_component' in altpll_component.clk0_duty_cycle.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(113): Unresolved defparam reference to 'altpll_component' in altpll_component.clk0_multiply_by.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(114): Unresolved defparam reference to 'altpll_component' in altpll_component.clk0_phase_shift.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(115): Unresolved defparam reference to 'altpll_component' in altpll_component.clk1_divide_by.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(116): Unresolved defparam reference to 'altpll_component' in altpll_component.clk1_duty_cycle.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(117): Unresolved defparam reference to 'altpll_component' in altpll_component.clk1_multiply_by.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(118): Unresolved defparam reference to 'altpll_component' in altpll_component.clk1_phase_shift.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(119): Unresolved defparam reference to 'altpll_component' in altpll_component.compensate_clock.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(120): Unresolved defparam reference to 'altpll_component' in altpll_component.inclk0_input_frequency.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(121): Unresolved defparam reference to 'altpll_component' in altpll_component.intended_device_family.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(122): Unresolved defparam reference to 'altpll_component' in altpll_component.lpm_hint.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(123): Unresolved defparam reference to 'altpll_component' in altpll_component.lpm_type.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(124): Unresolved defparam reference to 'altpll_component' in altpll_component.operation_mode.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(125): Unresolved defparam reference to 'altpll_component' in altpll_component.pll_type.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(126): Unresolved defparam reference to 'altpll_component' in altpll_component.port_activeclock.# # Region: /lvds_transmitter/DUT_2# ** Error: (vsim-10000) D:/VISH_WORKSPACE/Projects/Waveform_Generator/LVDS/pll_alt.v(127): Unresolved defparam reference to 'altpll_component' in altpll_component.port_areset.Link Copied
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hello vish2648
I have faced the same problem with you. I think you also use the library in modelsim.(Compile->StartSimulation Windows: In "Design" choose the tb file; In "Libraries" SearchLibraries->add: add the suitable library-> OK) This problem may be caused when verilog is used  in the IP but the VHDL library is choosed.  for example library altera: altera is VHDL library                      altera_ver(*_ver) is verilog library. Though it is too late to write back to you. Wish you solve this problem. Forgive me the poor English. Myy - Mark as New
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it helps. thanks!
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