Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16684 Discussions

Altera Multi-Channel FIFO- almost_empty

Altera_Forum
Honored Contributor II
946 Views

What is this supposed to connect to?

0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
287 Views

The logic that has the ability to fill it up? 

and / or 

Those that are taking things out fo the FIFO 

 

I could imagine a system where there are "bursts" of data to be taken out of the FIFO and the burst controller needs to know that it is getting close to enpty so that it handles access a little differently. 

 

I can also imagine systems that fill a FIFO with large bursts of things and need to know when the FIFO is almost enpty so it can cram more stuff in it before the FIFO goes fully empty.
0 Kudos
Reply