Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Classic Timing Analyzer constraints file

Altera_Forum
Honored Contributor II
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I am running the classic timing analyzer and I am having a problem figuring out where it's reading the constraints. 

 

I have an sdc file, which seems is not read, because commenting out all the entries does not seem to change anything. The qsf does not include any timing constraints. 

 

Which file then has the constraints? 

 

the command line is quartus_tan 

--read_settings_files=on --write_settings_files=off fpga 

 

Thanks
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Altera_Forum
Honored Contributor II
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If you generate "sdc" file it's better that you switch on TimeQuest. 

 

If you want to still use classic time analizer, you must set all your constraint from assignment editor. 

 

Hope it helps
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