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Hello,
I am trying to synthesis a 2KB Ram( with 1024 locations and 16 bit data respectively), in VHDL using Quartus 2 version 12.0 in a 32 bit windows 7 operating system. I am getting message as flow failed, and getting error as cannot fit design, and from the report, what I understand is the tool is trying to compile the design using LE's instead of block rams. Is there any way or option that I can change in the tool, and hence use total memory bits, instead of LEs?. Here is the report that I am getting. Flow Status Flow Failed - Mon Feb 16 16:51:05 2015 Quartus II 32-bit Version 12.0 Build 232 07/05/2012 SP 1 SJ Web Edition Revision Name ping_pong_buffer Top-level Entity Name ping_pong_buffer Family Cyclone II Device EP2C5F256I8 Timing Models Final Total logic elements 56,779 / 4,608 ( 1232 % ) Total combinational functions 24,009 / 4,608 ( 521 % ) Dedicated logic registers 32,826 / 4,608 ( 712 % ) Total registers 32826 Total pins 33 / 158 ( 21 % ) Total virtual pins 0 Total memory bits 0 / 119,808 ( 0 % ) Embedded Multiplier 9-bit elements 0 / 26 ( 0 % ) Total PLLs 0 / 2 ( 0 % ) Thanks, ManojLink Copied
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You need to copy one of the patterns that correctly infer ram.
Things like resets or latching the read data on a different clock can cause LEs to be used instead of ram.- Mark as New
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Sounds like you didnt follow the template for ram inference, or you did something that a ram cannot do (like reset its contents).
Why not post the code so we can have a look?- Mark as New
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--- Quote Start --- Sounds like you didnt follow the template for ram inference, or you did something that a ram cannot do (like reset its contents).Why not post the code so we can have a look? --- Quote End --- Hello Tricky and DSL,Thanks for your reply. Here is my code. I am trying to create a ping-pong buffer( two memories of size 2KB each. Which asserts an interrupt when one of the memories is full). I am attaching my code here with in a notepad file. Thanks
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The main problem comes because you didnt register the read address for the ram.
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--- Quote Start --- The main problem comes because you didnt register the read address for the ram. --- Quote End --- Hello Tricky, What do you mean by "didn't register the read address for the ram"?. I am sorry, but I am not able to understand that. Can you please elaborate a bit more on that?. Thanks for your time. Regards, Manoj
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you use the addr input without registering it first. To infer rams, they require you to have registered read address.
As a beginner, you would probably be better off learning out to use a RAM by generating one from the megawizard.- Mark as New
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--- Quote Start --- you use the addr input without registering it first. To infer rams, they require you to have registered read address. As a beginner, you would probably be better off learning out to use a RAM by generating one from the megawizard. --- Quote End --- Thank you. It worked, after registering the read address. Kind Regards, Manoj
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I tried using the megawizard first, but it gave me a bunch of signals and statements which I couldn't comprehend. I will dig more into megawizard, and use it.
Thanks, Manoj- Mark as New
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--- Quote Start --- Read the ROM and RAM user guide: http://www.altera.co.uk/literature/ug/ug_ram_rom.pdf --- Quote End --- Thank you.
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