Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16888 Discussions

How do I restrict the "step" to my TB & source codes in Questasim?

qs071870
Beginner
360 Views

Hi there, 

 

I recently came across this function to show the execution of codes in Questasim. It's useful for small simulations for someone used to programming. 

However with UVM testbenches, I see the UVM library codes most of the time. How do I change that function to limit print to my RTL and TB codes only? What is the reference I use to write such scripts? 

 

proc linetrace1000 {} { for { set n 0} { $n < 1000 } {incr n} { step; see 0 }}
 
 
 
Labels (1)
0 Kudos
1 Reply
TingJiangT_Intel
Employee
315 Views

You may try the following. "rtl" represent the path of your RTL file and "tb" for the path of your testbench:


proc linetrace1000 {} {

  for {set n 0} {$n < 1000} {incr n} {

    step

    if {[file tail [pwd]] eq "rtl" || [file tail [pwd]] eq "tb"} {

      puts "[pwd]: step $n"

    }

  }

}


0 Kudos
Reply