When creating a design with a source file containing MLABs, the mem_init_0 attribute value does not seem to be preserved in the programmed Stratix 3 FPGA. This is discovered during testing of a programmed Stratix 3 FPGA, in which the mem_init_0 value contents do not appear to be stored. If we use a mif file as source to provide the memory contents then during testing of the programmed FPGA, the original memory contents do appear to be stored. We would like to configure the MLABs directly using the mem_init_0 value rather than using mif files for each MLAB. How can we accomplish this so that the memory contents are preserved in the programmed FPGA? Has anyone else run into this problem?
