Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

Path timin Report

Altera_Forum
Honored Contributor II
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Hello every body; 

I have 4 cascaded operations operated with a single clk, I want to use the time quest path report to know these operations delay.I didnot know the meaning of "Through" text box in the report customization as shown in the attached print-screen? 

Thanks.
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Altera_Forum
Honored Contributor II
227 Views

Im not quite sure what you're talking about. If the two endpoints are registers, you can just use the "report timing" comand on the clock specifying the start and endpoint.

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Altera_Forum
Honored Contributor II
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Thanks Mr Ticky for your attention; 

yes my end points are registers, and I want to know the delay of a combination circuit between these two registers. 

 

I faced another problem. during the analysis and optimization, I found that there are some registers are removed and the reason are " Stuck at GND 

due to stuck port data_in ", how can I prevent Quartus to remove these register. 

Thanks
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Altera_Forum
Honored Contributor II
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If you report timing, you can see the delays for each LUT, routing, clock and any other delay in the route. 

 

If you're getting the warning "stuck at GND" then your register is always '0'. and hence removed as it does nothing. You need to review the source code to figure out why it has been stuck at GND. Setting a clock to '1' or '0'. or a clock enable to '0' will do this. You cannot otherwise force it to keep the register.
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Altera_Forum
Honored Contributor II
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Actually, you can, there is the SYN_KEEP attribute. But that needs adding at the source code level. But if you're getting this message without expecting it, you need to fix your source code.

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