I have a 32-bit flash device that I want to access read-only with the generic tri-state controller. Instead of a processor, I'm creating a state machine in Verilog and making it a custom component in Qsys with an Avalon interface to control the reads. However, I need the data to be 16 bits. So I basically need to perform 2 16-bit reads for every 32-bit read. I don't want to have to add a double-speed clock to do this, if I can help it. I noticed in the parameter editor for the controller the "bytes per word" option. If I set the data width to 32 and the bytes per word to 2 (instead of 4), would this do the trick? I guess it's not clear to me what the "bytes per word" option does.As I'm writing this, I think the answer is no, but if anybody has any ideas on this, it would be greatly appreciated. Thanks, Steve
If you create your avalon master with a 16-bit data bus and the avalon flash slave to a 32-bit data bus then the connection fabric should automatically convert your 16 bit reads to 32 bit equivalents. It will access the flash for each 16-bit read though.