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Hi All,
I have a state machine I'm implementing which essentially takes in and conditions samples from an ADC for export to a processing module. When I pull up the state machine in the viewer though I see behavior I'm not expecting and state transitions I didn't (intend to) code into the module. One of the conditions that keeps appearing is "(!CPU_Clear).(always0)" or "(!CPU_Clear).(!always0)". CPU_Clear is my active low reset signal. The second condition leads to an intended transition, going from the current state back to the start state, the first condition leads to an incorrect transition, going from the current state to the wrong state. Can someone tell me what the "always0" is indicating? The state machine is inside an always block, which is triggered at the positive edge of my system clock. I also have other always blocks that are triggered by other signal transitions. I can modify the code to post it if needed, but right now I'm just trying to understand what this "always0" is trying to tell me. Thanks!Link Copied
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