Use PCI avalon compiler in QSys.

[Altera_Forum]

I want to use PCI in our design, but the PCI compiler seems not working for Qsys in Quartus II 13.0. 

At the same time, SOPC Builder has been disabled in the latest Quartus.  So I tried SOPC Builder (in former version of Quartus), and generate a design with PCI avalon bridge. It is found that the bridge is build up by PCI avalon compiler with component ALTPCIAV, can I use this compiler or module ALTPCIAV in Qsys? How? I think altera should provide a backup solution for PCI interface to avalon interface bridge in Qsys, or give the SOPC builder back!

[Altera_Forum]

I generated a pci_compiler_0 component with lower version quartus and want to add the component in Qsys in Quartus II 13.0. However the generated module only provided two avalon-mm master, the prefetchable memory and non-prefetchable memory interface, which are different with what they act in SOPC Builder (Bar0, Bar1, Bar2 avalon-mm is provided seperated.) How to solve it?

[Altera_Forum]

Hello xydarcher, 

please we have the similar problem, have you solved it? How to make a design with PCI master/target with avalon interface in QSYS?  Thank you for your answer. Regards joey1

[Altera_Forum]

--- Quote Start ---  Hello xydarcher, please we have the similar problem, have you solved it? How to make a design with PCI master/target with avalon interface in QSYS?  Thank you for your answer. Regards joey1  --- Quote End ---    No, It's difficult to use that modules in QSys. We change our plan to use PCI Lite, which is capable of using in QSys. You can get PCI Lite core from SOPC Builder and convert the project into QSys.

[Altera_Forum]

Don't bother to mess with SOPC Builder together with QSys. The subtle difference in interfaces will give you too much trouble to deal with. In QSys, after you type pci in the libray search box, you'll find ip compiler for pci express usable for families before V generation. It is quite similar to pci compiler in SOPC Builder. For V generation, you have to use avalon-mm <family> hard ip for pcie Each component supports different feature set per family. Some porting work is required to move from one family to another. Not ideal, but you don't have to do it so often.

[Altera_Forum]

--- Quote Start ---  Don't bother to mess with SOPC Builder together with QSys. The subtle difference in interfaces will give you too much trouble to deal with. In QSys, after you type pci in the libray search box, you'll find ip compiler for pci express usable for families before V generation. It is quite similar to pci compiler in SOPC Builder. For V generation, you have to use avalon-mm <family> hard ip for pcie Each component supports different feature set per family. Some porting work is required to move from one family to another. Not ideal, but you don't have to do it so often.  --- Quote End ---    Does it mean that the pci express core can be applied to pci interfaces? I only have low-end cyclone 3 fpga for that.

[Altera_Forum]

I see what you are getting at. Didn't read carefully. Sorry. You'd better keep a good copy of that Quartus version that comes with PCI compiler in sopc builder. The days with those PLD core implementation of all those PCI variant may be gone. I didn't even think about those at all.