I am using a Terasic DE0 Nano (Cyclone IV E - EP4CE22) with an Ethernet peripheral component for passing command and data packets to/from a remote workstation. The SOPC has been programmed to accept a RPD file and program it into the configurator. Note the the DE0 Nano configurator is not a genuine EPCS64 but a work-alike part. I am using Quartus Prime Light 17.0.0 build 595. I have an IP license for the Nios and am using it. The Nios is using the legacy epcs peripheral for the reset vector.
The standard procedure for building a jic file is followed with the addition of also producing a RPD file for both the factory and the application binaries.
If I do not call the remote update function in the factory Nios software, the factory code runs just fine and returns the expected values for my user defined hardware and software version numbers. If I download the application jic to address 0x00000000 in the configurator and run it, I receive different, but expected, values for the hardware and software versions. This tells me that the FPGA and Nios binaries are good.
I then download the factory jic (with remote update disabled) and run it. When I download via Ethernet and overwrite the factory image in the configurator at address 0x00000000 with the application RPD image, the application runs (after a power cycle) and returns the expected values.
The problem occurs when I program the factory image jic with remote update enabled and with with the application image stored to 0x00400000. When the board is powered up, it appears that things are working, but I do not get any Ethernet communications. On a couple of occasions, I was able communicate and read back the hardware version for the application FPGA but the software version returned was for the factory Nios code. I have since recompiled the FPGA several times and am not able to replicate this. My working assumption is that the remote update is loading the FPGA code but then loading the Nios code from the factory area in the configurator.
There is no explicit description of how to make the RPD file or what needs to be done in in QSys other than instantiate the required peripherals. I must be missing something here, but I do not know what.
Any help would be appreciated.
I get no error messages when I generate the programming files. In addition, when I generate a factory image that starts at 0x000000 in the configurator and download it to the board, the FPGA starts normally.
It is only when I try to use an application image that resides at 0x400000 in the configurator that things go wrong. The application FPGA code seems to load, but the Nios code does not appear to run correctly (if at all). The very same binary, downloaded and programmed into the configurator at 0x000000 runs just fine.
I am using the legacy epcs controller as the reset vector for the Nios and have implemented the boot code module using the Eclipse tool set.
I have come to the preliminary conclusion that the FPGA configuration code is loaded from the correct location, but the Nios code is coming from the wrong place in the configuratior.
I have resorted to updating the factory image but this is not optimal since there is no fallback if it is corrupted during the update.
I have had to move on to more pressing things, but I still would like to get this working.