Preloader uboot SPL

[JBayl]

Hi,

We have a custom Cyclone V board that runs vxWorks.  All boot images are coming from the  QSPI with preloader separated from uboot.  Preloader starts @ 0x0 location, u-boot @ 0x60000.

I'm not trying to have Linux work on this board but i'm currently stuck with making the pre-loader and u-boot to work.  I followed the instructions from Rocketboards for (Cycone V Soc - Boot from QSPI) using Ubuntu22.04 on a VM on how to generate the preloader and u-boot.

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Introduction

I managed to compile/generate the u-boot-with-spl.sfp file using the socfpga_cyclone5_qspi_defconfig in the procedure, assuming that the generated file should at least show some boot messages on the serial port. 

But at power up, our custom board isn't showing any boot messages on the serial port.  Not even garbage text.

I then tried following the Mainline u-Boot for SocFPGA procedure to create a defconfig for our custom board but it's not compiling waiting for user input/decision. 

https://www.rocketboards.org/foswiki/Documentation/MainlineUBootForSoCFPGA

So my questions are:

- can i just write the u-boot-with-spl.sfp directly to the QSPI?  Considering the system already works with pre-loader and u-boot separated.

- is there a guide on how to generate a preloader and uboot for a custom board?

- for the custom defconfig, is there document that describes what each lines in the file mean?

I am currently enrolled to Intel® SoC FPGA Basics this coming May 25th.  I'd appreciate if you can share new materials that can help me get familiarized with using embedded Linux on a Cyclone V system.

Thanks!

[Jeet14]

Hi,

Please try Step by step procedure given in below link for Cyclone V SoC- Boot from QSPI-

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Cyclone_V_SoC_45_Boot_from_QSPI

The only thing you need to take care is while generating your .sof file for your custom cyclone project & based on this you need to configure socfpga.dtsi & socfpga_cyclone5.dtsi

cv_bsp_generator.py script is used to take the sources from the handoff folder i.e. quartus hardware project, format them appropriately and copy them to the U-Boot source code

If still issue comes then I will setup a call on 1st June as next 2 days I am out of office.

Regards

Tiwari

[Jeet14]

Hi,

Any update on the previous reply?

Regards

Jeetesh

[JBayl]

No progress.  I'm currently trying out the steps on my SoCKIT board, but no significant progress yet.  How do we setup a call?

[Jeet14]

Hi Joel,

Thanks for attending the MS teams call.

I had sent an email to your email id.

BTW, are you able to test with older design which was based on Quartus v16?

Regards

Tiwari

[Jeet14 · Accepted solution]

Hi Joel,

Thanks for attending teams call.

Let me know if you have any other query on this.

Regards

Tiwari

[R_G]

Hi,

I read through this thread. So I'm curious, what was the solution to the problem? I have a similar issue where I have a custom Arria 10 design and the Rocketboards instructions for building the bootloader don't seem to be working for me. The memory and IO do not seem to be getting configured correctly by the preloader. I get no output from the serial terminal while the preloader executes and I get the following error when uboot is loaded through the Arm Development Studio debugger:

+loadfile u-boot-socfpga/u-boot
Target Message: Memory access caused precise abort.
Debug Precise Abort Registers : DFSR = 0x00000808, DFAR = 0x01000040
ERROR(CMD16-TAD59-NAL18):

It seems like the qts-filter-a10.sh script used in the Rocketboards building bootloader instructions doesn't seem to be picking up all of the custom board configuration differences that need to get transferred into the uboot build files (like memory for example). I'm hoping that the solution to his problem will apply to my problem. 

Thanks for your help,

Richard

[JBayl]

Hi Richard,

Issue is still not resolved.  Intel support suggested i re-open this when i come back from vacation, but i didn't.

I'm currently working with an ARROW tech support and a couple of Intel PSG to help me ]out.

Current status is that they suggest to debug uboot to see what's going on.

Good luck!

[GOMEZ_IT]

Hello!

I wanted to know if the problem of compiling U-boot for a custom board with cyclone 5 soc has been solved.
At the moment I'm trying to create an SD image to start u-boot on my cyclonev custom board without success.

regards,

Luca