how to use separated the FPGA configuration and HPS booting?

[Rainwang]

As below figure shows, we use the 10AS016 chip, and we have 2 EPCQ flashes on our board, one for HPS booting and the other for FPGA configuration. We stored the FPGA configure file in the FPGA side EPCQ because we want to use the “remote system update” feature in our application to manage the factory image and app image.

With this structure, I think the separated FPGA configuration and HPS booting is suitable for us. But because we need to use DDR for our HPS, per the manual, If the hard memory controller or shared I/O are required by the HPS, then the FPGA fabric and I/O (FPGA, shared and hard memory controller) configuration must be complete before the HPS can boot. But I don’t know how to control the HPS booting start only after the FPGA configuration done, I checked several documents but found no information for this, so can you help to tell me how to do with this?

Thanks in advance.

[Rainwang]

I have no more questions on this topic, pls close this case and very thanks your strong support these days!

[EBERLAZARE_I_Intel]

Hi,

I’m glad that your question has been addressed and thanks for your patience on the response time from my side, I appreciate that. I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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