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Dear Intel Support Team,
I am currently trying to enable Intel SGX and Intel TDX features on my server platform, equipped with Intel Xeon Silver 4510. However, during the BIOS configuration, I encountered the following error message:
"Memory population does not meet SGX memory POR. SGX setup configuration preconditions for enabling were not met. Please check TME, MirrorMode, or Extended APIC settings."
Given this, I would like to inquire about the following:
What are the specific hardware requirements for memory modules (DIMMs) to support Intel SGX?
For example, are there any constraints regarding DIMM type (RDIMM, LRDIMM), capacity, rank, speed, or memory population rules (slot layout)?How can I systematically verify whether my installed memory meets these requirements?
Are there any recommended tools, commands, or diagnostic methods provided by Intel to check memory compatibility for SGX?What are the mandatory BIOS settings related to memory and CPU configuration to enable SGX correctly?
Particularly, how should TME, MirrorMode, and Extended APIC be configured?
We would greatly appreciate Intel’s guidance to ensure our platform configuration meets the required criteria, and we can successfully enable these security features.
Looking forward to your support.
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Hello.
As the BIOS message states, there are memory population rules to be able to enable SGX/TDX. Please see the "Hardware Selection" part of our TDX Enabling Guide: Hardware Selection - Intel® TDX Enabling Guide
For the BIOS settings to enable TDX, we also have those in our TDX Enabling Guide, but these are specific to change from defaults in Intel's Reference BIOS, and OEMs may implement different menus with different names, so it would be very hard to document them all. Most OEMs have documented how to enable TDX in their online BIOS manuals at this point, so looking through those for your particular server may be helpful. Here's ours for reference: Hardware Setup - Intel® TDX Enabling Guide
Regards.
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Dear Intel Support Team,
I am writing to clarify a technical requirement outlined in your official SGX/TDX enabling documentation. Specifically, regarding the memory population rules stated below:
“At minimum, all slot 0's of all Integrated Memory Controller (IMC) channels for all installed CPUs must be populated (i.e., 8 DIMMs per populated CPU socket, at least). DIMM population must be symmetric across IMCs.
The following figure shows possible populations per populated CPU with 8 or 16 DIMMs...”
We seek clarification on the following points:
DIMM Capacity Requirements:
Does the requirement for populating 8 or 16 DIMMs impose specific restrictions on DIMM capacity (e.g., 16GB/32GB/64GB)?
For example, is it permissible to use mixed-capacity DIMMs (e.g., 16GB and 32GB modules) across slots, provided the total count and symmetry requirements are met?
Or must all DIMMs be identical in capacity?
Capacity Constraints (if applicable):
If capacity restrictions exist, are there minimum capacity thresholds or capacity combination rules (e.g., per-DIMM minimum capacity, channel-level uniformity)?
This clarification is critical for our hardware selection in multi-CPU server configurations. Your detailed guidance would be greatly appreciated.
Thank you for your support!

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