Re:Compute in data streaming accelerator

asdasf · ‎01-17-2026

Hi,

I am currently trying to use the Data Streaming Accelerator (DSA) to (1) read two inputs, (2) do XOR, and (3) store the outputs.

According to the “Intel® Data Streaming Accelerator Architecture Specification (v3.0)”, this kind of compute operation appears to be supported by the hardware.

However, when using the Intel Data Movement Library (DML) or when using DSA directly via idxd.h, I cannot find any interface for XOR operations -- only memory copy, memory fill, ...

Are the compute operations described in the DSA architecture spec currently unavailable in software stacks?

If they are available, is there any guideline, header, or example for using them?

Thanks.

// idxd.h

/* Opcode */

enum dsa_opcode {

DSA_OPCODE_NOOP = 0,

DSA_OPCODE_BATCH,

DSA_OPCODE_DRAIN,

DSA_OPCODE_MEMMOVE,

DSA_OPCODE_MEMFILL,

DSA_OPCODE_COMPARE,

DSA_OPCODE_COMPVAL,

DSA_OPCODE_CR_DELTA,

DSA_OPCODE_AP_DELTA,

DSA_OPCODE_DUALCAST,

DSA_OPCODE_TRANSL_FETCH,

DSA_OPCODE_CRCGEN = 0x10,

DSA_OPCODE_COPY_CRC,

DSA_OPCODE_DIF_CHECK,

DSA_OPCODE_DIF_INS,

DSA_OPCODE_DIF_STRP,

DSA_OPCODE_DIF_UPDT,

DSA_OPCODE_DIX_GEN = 0x17,

DSA_OPCODE_CFLUSH = 0x20,

};

Poojitha · ‎01-18-2026

Hi asdasf,

Greetings for the day!

Thank you for reaching out to Intel Support. We acknowledge receipt of your concern and would like to assure you that assisting you is our top priority.

To assist you further, we require some additional information from your end.

Kindly provide the system details and the processor model for which you are seeking the necessary information.

This will help us review the complete details and assist you further.

We appreciate your understanding!

Best regards,

Poojitha N

Intel Customer Support Technician

asdasf · ‎01-19-2026

Thank you for your prompt response.

Regarding your request, please find the system details below:

Product / Platform

Intel Xeon Platinum 8558 (2× sockets)

OS / Kernel / Drivers

OS: Ubuntu 25.04 LTS
Kernel: 6.14.0-1007-intel
DSA driver: idxd v1.0
Library: Using the linux/idxd.h UAPI headers for descriptor submission
accel-config version: accel-config 4.1.8+

Issue summary

We are attempting to submit a descriptor for a Reduce/XOR operation through the user-space write(fd, &desc, …)submission path using /dev/dsa/wq*. The device returns a completion status 0x10 (DSA_COMP_BAD_OPCODE). The same descriptor pipeline works for DSA_OPCODE_MEMMOVE.

This raises the question of whether Reduce/XOR opcodes are currently supported on this CPU/driver combination or require a newer DSA specification / microcode / driver stack.

If you need additional traces, PCIe capability dumps, DSACAP registers, or accel-config dumps (accel-config list -i), I will gladly provide them.

Thank you again for your assistance, and please let me know if further details are required.

Best regards,

Juntaek

pujeeth · ‎01-19-2026

Hello asdasf,

Thank you for providing the detailed issue summary regarding the DSA Reduce/XOR descriptor submission failure.

To proceed with our analysis, could you please share the following details from the affected system:

1) DSA capability registers

2) Full DSA configuration and work queue information:

3) PCIe capability and device information for the DSA device:

4) Kernel log messages related to DSA initialization:

Regards

Pujeeth_Intel