How was a MCE error saved to ERST？

[xeoncrash]

Hi,

  I have a question regarding to Intel Cascade Lake Xeon products, I have installed a Linux system with a cascade Xeon Cpu, I got a system freeze(hang) issue, and did not see any pstore log. Here I am wondering, if an MCE error happened and lead to my issue, how this info was write to ERST?

Is the path like  CPU-> MCE -> OS interrupt handler -> UEFI channel -> ERST table?

 or  CPU -> MCE -> BIOS ( firmware first) -> ERST table?

does the interrupt be processed by kernel or by BIOS firmware directly?

If I suspect a MCE was triggered, which part is the most suspicious module that caused info not written to ERST?

Thanks

[pujeeth]

Hello xeoncrash,

Greetings!

We would request you to provide us the below information:

1) Please share the system details and processor information.

2) Kindly provide the debug logs for further troubleshooting.

How to Collect the Baseboard Management Controller (BMC) System Debug Log for Intel® Server Boards and Intel® Server Systems

https://www.intel.com/content/www/us/en/support/articles/000027943/server-products.html

Regards

Pujeeth

Intel customer support technician

[pujeeth]

Hello xeoncrash,

Greetings!

This is the first follow-up regarding the issue you reported to us.

We wanted to inquire whether you had the opportunity to review the plan of action (POA) we provided.

Feel free to reply to this email, and we'll be more than happy to assist you further.

Regards,

Pujeeth

Intel Customer Support Technician

[pujeeth]

Hello xeoncrash,

Greetings!

This is the second follow-up regarding the issue you reported to us.

We wanted to inquire whether you had the opportunity to review the plan of action (POA) we provided.

Feel free to reply to this email, and we'll be more than happy to assist you further.

Regards,

Pujeeth

Intel Customer Support Technician