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Joe_Z_1

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11-05-2015
02:51 PM

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WordSize of SFMT19937

While generating integer sequences of *n* elements using the the SFMT19937 BRNG, I noticed that the output consisted of exactly *n* elements, while I should have received 4*n* elements, according to the Intel VSL Notes documentation.

I also found that the SFMT19937 WordSize obtained from the VSLBrngProperties struct returns 4, when I expected this to be 16.

Is this the correct behavior for the SFMT19937 BRNG? If so, how would I go about obtaining all 128 bits of output?

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Andrey_N_Intel

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11-05-2015
10:09 PM

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Hi Joe,

yes, this is the correct behavior of the SFMT19937 BRNG. We should fix the documentation, thanks for letting us know about the issue. In order to get n 128 bit outputs from the UniformBits() routine, pass 4 n as vector size into this function. Please, let me know, if it addresses your question.

Andrey

Joe_Z_1

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11-09-2015
07:30 AM

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Thanks Andrey. That clears up part of the puzzle, but I have another related question:

Lets say I start with 2 identical SFMT19937 steams, both seeded with the decimal value 177. Using the first stream, if I request a single uniformly-distributed integer value from the uniformbits() routine and then convert the integer value to a real by dividing by 2^32, the resulting real value is 0.306946337223052978515625

Using the second stream, if I request a single uniformly-distributed real value from the Uniform() routine, the value returned is 0.806946337223052978515625

Why has 0.5 been added to the real value in the Uniform() routine?

Andrey_N_Intel

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11-09-2015
11:30 PM

66 Views

Hi Joe,

Transformation of the 32 bit unsigned integer u into uniformly distributed on the interval [a,b) real number r inside of SFMT19937 relies on the rule: r = (int)u * (b-a) / 2^32 + (b-a)/2. The choice of the transformation is dictated by the performance considerations. We should fix the description of the generator in the documentation. Thank you.

Please, let me know, if it helps.

Andrey

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