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Hi guys,
I'm fairly new to FPGAs and in particular Altera stuff so please excuse any naive comments I might make. I'm having a problem getting a FIFO to work with the Nios II processor so that I can interface to an imaging sensor. I've been trawling the web and the forums for an answer but alas to no avail... Firstly does anyone know of an example/development kit project/tutorial which implements an example of a FIFO interfacing to an off chip peripheral on one side and a Nios processor on the other? An example is always helpful. Right the procedure I have followed is: I've instantiated the SOPC FIFO as a DCFIFO with an avalon-MM interface on one side and an avalon-ST sink interface on the other. I don't have any status interfaces on the read or write side. The MM (read) side is connected to my CPU. I've then created a custom peripheral and used the templates to create an avalon-ST data source. This is then connected to the ST side of the FIFO. I've then generated the system and when I bring it into verilog I get a bunch of exported signals from the ST source which then allow me to write to the custom peripheral. Is this a logical way to go about implementing what I want to do? Or is there a problem with the custom peripheral in this format? I then run the following code to try and read the FIFO: #define DATA_BASE (alt_u32) 0x00005040 # define WRREQ_BASE (alt_u32) 0x00005050 # define FIFO_BASE (alt_u32) 0x00005068 # include "sys/alt_stdio.h" # include "altera_avalon_fifo_regs.h" # include "altera_avalon_fifo_util.h" int main(void){ unsigned short n=0; n = altera_avalon_fifo_init(FIFO_BASE,0,0,0); alt_printf("%d\n",n); while(1){ n = altera_avalon_fifo_read_fifo(FIFO_BASE,0); alt_printf("%d\n",n); } return 0; } However when I write data to the FIFO I just get nothing coming out in the console.... I'm not really sure though that I'm using the initialise command correctly. If all this is correct then I guess I must have a problem with my data input. Thanks in advance for any help =). RichardLink Copied
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