FPGA: Max10 10M04SAE144
I want to perform a remote system update via UART on my MAX10 device.
Tried to follow instructions from AN741 (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an741.pdf) and the youtube video (https://www.youtube.com/watch?v=KPWOpYQD_JM). I tried to match my settings and follow the video guide closely.
Screenshots of my schematic and the connections in Platform designer are attached.
I've converted the programming files and programmed the FPGA, but I can't establish a UART connection to perform the RSU.
I toggled the nPulse pin, but whenever i send UART data, i get no response from the FPGA.
Can you give any advice?
Thanks in advance!
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I just want to get some clarification from you for further investigation.
Thanks for your advice, but I still couldn't get it working correctly.
Yes, i compiled my Programm successfully and was able to convert the .sof to .pof files and program them into the MAX10
I'm not using any external flash because the software is very small so far - but I'm not sure if i made the correct configurations for this, the documentation is very poor tbh.
However, I checked back the AN741 video and in the Platform Designer, the author was using the onchip memory IP, but whenever I add this, im getting Error 14703 while compiling - the fix said to NOT use dual configuration, but that was against the RSU settings.
The UART is set accordingly, correct pins are selected. Terminal programm UART settings match the Platform Designer settings. Whatever I send to the device with the Terminal, I'm not getting any response. (I've tried connection TXD and RXD in the FPGA, the character is correctly echoed back, so the UART should be working)
Thanks in advance
Edit: the problem seems to be the nios 2 software:
I want the nios 2 software to be located in the UFM, but I'm not really sure how to do this.
In NIOS 2 SBT Eclipse, I created the BSP file for my device and made an application containing the remote_update.c file of the example project from AN741 which includes the UART update handling interface.
Then I build the mem_init_generate.
In the QSYS/Platform designer, the On-Chip Flash Intel FPGA IP is used, under "Flash Initalization" i checked "user created file" and linked the .hex file i created from my application. Qsys file was generated, project compiled and .sof files converted to .pof and put onto the FPGA with the programmer.
What's the correct way of getting my application into the FPGA?
Thanks for your reply.
“im getting Error 14703 while compiling”
For this error, you can refer the answer in the following link:
“I want the nios 2 software to be located in the UFM, but I'm not really sure how to do this.”
You need to follow the step from 1.7.2(on Page 11 in AN471) in order to program Nios II application code into the QSPI flash. Have you follow this step correctly?