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nios ii flash programmer

praveenkumar
Beginner
1,087 Views

can anyone tell me how i can know the  external flash is connected .

i added generic tristate controller and conduit bridge in qysys.

and assigned pins in pin planner .

i want to write to nor flash but  target is not connection

it is shwing "no nois 2 target is conncted or sof is not downloadded.but i did both 2 of them and i refreshed so many times.

can anyone tell me what i am doing wrong

0 Kudos
15 Replies
EricMunYew_C_Intel
Moderator
1,045 Views

did you mean you can't write to the CFI flash? any log?


praveenkumar
Beginner
1,040 Views

we are using   micron parallel nor flash 256mb    Rc256p33tfe   with the cyclone iii device in active parallel mode

after  adding generic tri state controller and conduit bridge in qsys  

by giving frin command line : nios2-flash-programmer  --base=0x01000000 --debug

its showing  like below no cfi table found 

info: Mar 28, 2013 12:52:59 PM - (INFO) elf2flash: args = --input=E:/PCIE/NOR_FLASH/software/Hello/Hello.elf --output=E:/PCIE/NOR_FLASH/software/Hello_bsp/flash/Hello_cfi_flash_0.flash --boot=C:/altera/12.0/nios2eds/components/altera_nios2/boot_loader_cfi.srec --base=0x10000000 --end=0x20000000 --reset=0x10000000 --verbose 

 

Info: Mar 28, 2013 12:52:59 PM - (FINE) elf2flash: Starting 

 

Info: Mar 28, 2013 12:52:59 PM - (FINE) elf2flash: Done 

 

Info: Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 

 

Info: Resetting and pausing target processor: OK 

 

Info: Reading System ID at address 0x20005008: verified 

 

Info: no cfi table found at address 0x10000000 

 

Info: Original contents (after writing 0xF0 and 0xFF00FF to address 0x10000000): 

 

Info: 0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 10: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 30: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: 40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: Contents after writing 0x980098 to address 0x100000AA: 

 

Info: Same after writing 0x980098 to address 0x10000154: 

 

Info: Same after writing 0x00980098 to address 0x100002A8: 

 

Info: Same after writing 0x980098 to address 0x10000055: 

 

Info: Same after writing 0x980098 to address 0x100000AA: 

 

Info: Same after writing 0x00980098 to address 0x10000154: 

 

Info: Same after writing 0x980098 to address 0x10000154: 

 

Info: Same after writing 0x980098 to address 0x100002A8: 

 

Info: Same after writing 0x00980098 to address 0x10000550: 

 

Info: 0: 89 00 01 00 89 00 04 00 04 D8 04 D8 04 D8 04 D8 ................ 

 

Info: 10: 51 00 59 00 00 00 01 00 00 00 00 00 20 00 95 00 Q.Y......... ... 

 

Info: 20: 0A 00 00 00 02 00 00 00 01 00 0A 00 01 00 03 00 ................ 

 

Info: 30: 02 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF ................ 

 

Info: 40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 

 

Info: Ignored possible autoselect code 89-01 as no override data 

 

Info: present in section [FLASH-89-01] 

 

Info: Ignored possible autoselect code 0089-0001 as no override data 

 

Info: present in section [FLASH-0089-0001] 

 

Info: Ignored possible autoselect code 00010089-00040089 as no override data 

 

Info: present in section [FLASH-00010089-00040089] 

 

Info: leaving target processor paused 

 

by reading through c code  by debugging

we got cfi information misssing at ox11 addresss  it had to be 0x52 but its showing ox5100.

 

even though i tried to  flash both sof and hex files from nois2flash prorammer gui

its showing

  error code8: programming file path --verbose

 

i find cfi table information is missing i tried to override my cfi flash by nios2override file by placing it in  path   nis2eds/bin

 

its showing

 

cfi erase region definitions dont match with device size    

base address  not aligned in device  size (in my qsys address of generic controller is  0x01000000 )

 

how can i access the flash   because i have to load   (hex  or  flash file ) through uart  and i have to write in flash and run from memory.

 

 

EricMunYew_C_Intel
Moderator
985 Views

Can you check and refer to the attached.

praveenkumar
Beginner
978 Views

eah its the same way  i designed  in the qsys  and also   while  i writing to  flash  by following the datasheet procedure   .

ox4089  if i am writing this  16 bit  data in some 0x0 location

and while i am reading the location  0x0 its showing 0x89 and 0x1 location  its showing 0x40.

its showing lsb in 0x0 location and MSb in 0x1 location.

through code its reading  some cfi table locations according to datasheet.

so i think i correctley designed in qsys. and none of the above problems are solved .

 

and another question i converting .sof file to pof and i added cfi flash programmed through quartus programmer and it is stored in flash and application is running on power on. in same way if i convert the sof file to hex format and receive through uart and i will erase the flash and write the data in hex format manually through c code . will it run on power on condition

 

thaks for reply.

nome
Beginner
970 Views

Hello

Can we access or flashing Directly from FPGA if we doesn't  have CPLD in our Board?

praveenkumar
Beginner
957 Views

No,we didnt have cpld in our board ,we normally flashing through jtag in quartus  prorammer  by convertiong sof  to pof . it is running fine after power on . but in final level after system integration  it's not possible to flash using jatg .

so we have to download it through uart  by writing the file  flash manually from 0x20000 .

Is it workout .

and also problem with generic tristate conroller behaving like explained below 

 i designed  in the qsys  and also   while  i writing to  flash  by following the datasheet procedure   .

ox4089  if i am writing this  16 bit  data in some 0x0 location

and while i am reading the location  0x0 its showing 0x89 and 0x1 location  its showing 0x40.

its showing lsb in 0x0 location and MSb in 0x1 location.

through code its reading  some cfi table locations according to datasheet.

so i think i correctley designed in qsys. and none of the above problems are solved .

 

please answer these two questions.

praveenkumar
Beginner
952 Views

yeah we can   access  the flash through fpga without cpld  in quartus programmer and also with nios  ii flash programmer .after

compilation stage goto

programmer section and attach or add  your fpga device  and browse for .sof file  if u want to program to flash

right click on fpga  device  and u can find attach flash option .

u can choose which flash u used in your card .

and programm it.

nome
Beginner
940 Views

Hello

I am trying to configure EP2AGX Arria® II GX using EPM240 Max ii CPLD and on board having CFI Flash js28f256m29ewh 

In my case our custom Board having Flash Address bus A0 to A24 bus and Data D0..D7 Bus connected with FPGA CEn, OEn,  WEn with FPGA

In case of cpld we have only Flash Address bus ,CEn and OEn, pins  WEn not connected with CPLD and also there is no data bus between cpld an flash 

So That's why I am confuse how to program flash memory 

Is it with from CPLD Or FPGA  because of Flash Data Bus only connected with FPGA configure data 8 bit port like DATA0 to DATA7

That s why I asked you 

In your Above case I think its Big Endian and Little endian Issue I did this issued in PIc32 MPU  

Thanks for your Reply knowledgeable

Nome

 

praveenkumar
Beginner
935 Views

hi nome ,

In ur board there is no  flash data  bus  lines  connected to ur P2AGX Arria® II GX   or  EPM240 Max ii CPLD.

CFI Flash js28f256m29ewh for this flash   if  there is no data lines   u cannot use it  .

its like waste piece in board.

nome
Beginner
930 Views

Hello praveenkumar

As above I told Data Bus only connected with  FPGA  EP2AGX Arria® II GX  

 

No Data Bus connected with CPLD even no WEn pin connected with CPLD 

 

So That's why I am confuse how to program flash memory by CPLD OR FPGA 

 

Thanks

Nome

praveenkumar
Beginner
921 Views

hi nome , as u said

Data Bus only connected with  FPGA  EP2AGX Arria® II GX  

 

No Data Bus connected with CPLD even no WEn pin connected with CPLD .

 the u can program it with ur fpga only.

i dont know why  u r using cpld .  there is no option for loading through jtag.

u can program ur flash by using fpga .

nome
Beginner
898 Views

Hello

Thanks for your reply

True But Flash address bus  A0 to A24 is connected With CPLD CEn and OEn, pins and also

One 12 bit Data Bus connected between CPLD and FPGA 

My question is If we want to use Cpld as a flash programming  first Load SOF in Fpga to connected Flash Data Bus to CPLD data Bus also WEn pins

Maybe CPLD  will work as a flash Programing 

What would you say ? 

Thanks 

Nome

praveenkumar
Beginner
892 Views

hi ,

good to hear that but  u r  flash is 12 bit data bus or other .

and also have u ever tried to access the flash with  nios ii  software  or some other programming .

in my project there is an issue which i mentioned above .

try to reply to my email :

praveentatikonda2155@gmail.com

EricMunYew_C_Intel
Moderator
857 Views

Have you tried to program your flash using Quartus Programmer and PFL.

You can refer to below for PFL IP:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf


praveenkumar
Beginner
852 Views

yeah i tried with pfl ,

actually  i initilized onchip memory with hex file and i genreted the sof file .

and that sof file is  converted into pof file .

that is wroking fine  on power on .it s stored in the flash .

but when i add tristate controller and conduit bridge   its not working .i tried all  the methods explained in edhandbook.

when i add sof and hex file separately to  generate the pof  and i programmed its not working.

i want to know the pof file content and when converted to .hexout  there is  so much  data  .i want to know the addresss in which that data of pof  is storing in cfi flash locations.

 

 

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