Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12612 Discussions

Altera Monitor Program- Nios 2 processor

Altera_Forum
Honored Contributor II
‎08-29-2011 09:45 AM
1,032 Views

When I try to load the program to DE2 board I get the following error:- There are no Nios II CPUs with debug modules available which match the values 

specified. Please check that your PLD is correctly configured, downloading a 

new SOF file if necessary. I am new to FPGA. Please help me
0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎08-30-2011 07:38 AM
312 Views

Did you configure the FPGA first? Ensure that both your software and the .sof FPGA image that you load are based on the same design.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎08-30-2011 07:54 AM
312 Views

yes sir i have done everything you mention and my software and .sof image are based on the same design.

0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.