Automatic login and to decrease booting time in soc

[Altera_Forum]

Hii Everyone, 

I've been looking everywhere and could not find any correct resources to help me. I designed Ethernet board with Cyclone V(5CSEBA5U19A7N) using Quartus 15.1 Prime Standard & DS-5. Now i want to do two things. 1)How to boot linux automatically without login. 2)How to decrease booting time in the soc arm processor..  I am using Altera 15.1 inbuilt root file system and zImage...If u have any documents or links from scratch regarding to my query, plz forward and help me.   Thanks & Regards,  Chethan  

[Altera_Forum]

A few thoughts for decreasing the boot time: 

1. If you use the HPS to configure the FPGA, consider doing a independent booting instead (for example, booting the FPGA via EPCS flash while HPS boots from SD without configuring the FPGA). To do this, remove the u-boot.scr script in the SD Card. On the FPGA side, flash the image into EPCS. A note on this - you may NOT want to do this unless you are sure that the HPS-FPGA bridges initialization will not be impacted. 2. While compiling the kernel, go to include/configs/socfpga_common.h and change the CONFIG_BOOTDELAY (this is the delay before the uboot loads the next stage of boot). Refer to https://rocketboards.org/foswiki/view/documentation/embeddedlinuxbeginnersguide ("Configure and Compile Uboot Stage") 3. It might be too late to do any changes now, but QSPI actually boots faster compared to SD card :) 4. Of course you can further tweak the kernel to leave some packages out, but I am not a Linux expert so I'm leaving this out...  Regarding automatic login - there's a lot of methods (search with google). Some involves modifying init.d or other Linux files, but definitely possible given that people uses this for headless display.