Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

Avalon Master Port

Altera_Forum
Honored Contributor II
905 Views

Hi. Am am a relativly new user of the SOPC builder I am trying to create a simple master port for the avalon bus. I instantiate it as an Interface to User Logic outside the system module. I have a number of standard ports like clk, read ,wr,read and wr data and FLUSH pin .. When i generate the system al the pins are in the symbol except FLUSH.  

Any ideas? Does it mean it is not generated, but i see it in the PTF file. What should i do? 

Thanks Sergey
0 Kudos
0 Replies
Reply