I have a timer instantiated in SOPC at a 10usec rate. This timer drives 2 alarms, one at a 10ms rate and one at 420usec. I have some user logic (in my application it's an FSK demodulator) that is firing other interrupts to the Nios II at 420usec. When all the IRQs are enabled, the 10ms alarm becomes very innaccurate. I have measured the time inside the one 420usec interrupt to be 30usec. The other one should be way faster as all it does is write a PIO.
The clock is 65MHz. How can the system not keep up? Since the one ISR is approx. 30usec long - there would be up to 3 IRQs from the timer ticks during this other ISR. What happens to the 3 interrupts? Are they all registered somehow or are some of them missed?
thanks in advance...
