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Hard lock with Nios 2 cyclone dev board

Altera_Forum
Honored Contributor II
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Hey guys, I'm trying to get to work developing on the nios development kit cyclone edition. The board has a Nios II chip version 1.1 and a Cyclone EP1C20F400C7 FPGA. I am running Quartus II 4.2 Full edition and the Nios II Development Kit 1.1 on Windows 2000 SP4. I have also verified that my COM1 port, serial cable, and USB ports are functional. I am connected to the device with the USB Blaster(which i have installed the drivers for following the getting started guide). 

 

I connected my board step by step as specified in the getting started guide. The board will boot up, goes to safe mode, and starts the web server which i am able to connect to. When i open any of the provided Quartus II projects (standard, low cost, small, full featured) and go to Tools->programmer and use the default .sof Quartus II says the operation was successful, but my board hard locks. The LEDs turn off, the LCD freezes, and all of the segemts on the 7-segment display light up. When I press Power-On reset it tries to read the user data, fails, and reverts to the factory fail safe. 

 

I tried connected through a terminal by typing "nios2-terminal" and it prints out 3 lines in the terminal that say: 

nios2-terminal: connected to hardware target using JTAG UART on cable 

nios2-terminal: "USB-Blaster [USB=0]", device 1, instance 0 

nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate) 

 

but then i get an error that says "nios2-terminal..exe has generated errors and will be closed by windows. You will need to restart the program. An error log has been created" and the system locks up as described above. 

 

Any ideas? I have also tried establishing a serial connection using "nios-run -t -r" and "nios2-terminal -U  

--port=/dev/com1". This says that it has connected and started a terminal, but I get no debugging info out on reboot and the Tx and Rx lights never blink. This is all off of the Console port. 

 

Has anyone had this problem getting started or have any idea? Altera's tech support is painfully slow, and this should not be difficult. Thanks for any help! 

 

-jon
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Altera_Forum
Honored Contributor II
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Hi jonb, 

I think your problem is that you download only ".sof" file, that means only the hardware configuration of your FPGA, and it's a volatile download. 

So u have to create a software project, linked with your hardware configuration, using IDE interface (there is a "getting started" for it...) and, after downloading ".sof", download the software project. 

It's long to explain but this is the way...
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Altera_Forum
Honored Contributor II
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Thanks for the response Soin, and you are correct, here is what I tried which is exactly what Altera provides the getting started guide: 

1) open Quartus II 4.2 to the standard example. 

2) select Tools -> programmer 

3) check "program/configure" and click start 

4) Quartus II reports the chip was successfully programmed (board is hard locked now) 

5) start the Nios II IDE through SOPC builder 

6) go to "New > C/C++ Applicaiton" 

7) Select the Hellow World project and click finish 

8) right click on the project and click "build project" 

9) Nios II reports "Build Complete" so i select "Run..." from the Run menu 

10) In there I click the "New" button for Nios II hardware 

11) I select the USB-Blaster as my JTAG and the EP1C20 as the device  

12) I click "Apply" and the "run" 

13) I then get the error: "there are no Nios II CPU's with debug modules available which mach the values specified. Please check that your PLD is correctly configured, downloading an new SOF if necessary." And it pops the Quartus II programmer back up. 

 

Now, I'm assuming that the board shouldn't be locked up between flashing the standard CPU and downloading the program code and that is the source of this error. Since I have never used an Altera board I can't say that for certain, but I'm assuming that is my problem. Any other ideas? should i try programming the EPCS with my FPGA configuration data? Thanks 

 

-Jon
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Altera_Forum
Honored Contributor II
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u haven't downloaded the correct ".sof" file. When you create a new software project, u have to specify a ".ptf" file in "SOPC builder System", that's the hardware configuration to which your software project is linked. Then u have to open the Quartus programmer and download ".sof" file of that hardware configuration. 

Try
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Altera_Forum
Honored Contributor II
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after step 4 make a hardware reset to load the programmed design 

(Button Power-On Reset)
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Altera_Forum
Honored Contributor II
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Soin- I went back and checked and I am using the .ptf that matches my core in the "SOPC Builder System". When the Quartus programmer comes up I specifying the matching .sof file and I am still experiencing the hard lock after Quartus II tells me I have a successful flash. 

 

Fischer - I did do the power on reset and the LED indicates that it is attempting to load the user core, but then it fails and reverts back to the fail-safe core again. It should successfully load the user data after step 4, right? 

 

Any other ideas? Thanks again for all the help guys! 

 

-Jon
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Altera_Forum
Honored Contributor II
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sorry, 

i have overlooked that you used the quartus programmer, 

 

but you don't have to use quartus to program the fpga with a .sof file, 

this only writes the .sof file into fpga ram and everything is lost after  

reset. 

you have to use the flash programmer from NIOS ide tools menue 

and flash your successfull generated program with the .sof file  

into the flash on the development board. (user image). 

so after step 9, goto ide -> tools -> flashprogrammer. 

flash your software file and hw user configuration 

after this, reset the board (user image should load succesfull)  

and try to start the debugger by menu -> run ->debug... 

 

in general: 

 

the quartus programmer programs the .sof file directly into the  

ram of the fpga (everything lost after reset). 

 

the nios ide flash programmer converts the .sof file into a .flash file 

and programs this file into the flash on the board. After reset the 

configuratin controller (epld on board) loads this hw description from 

the flash and writes it to the fpga ram.
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Altera_Forum
Honored Contributor II
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Thanks for the info Fischer and I see what you mean, but I am still having problems getting the files to the board. The board is freezing when it tries to download the SOF file after giving me JTAG errors. I either get "Cannot access JTAG chain" or "expecting 0xYYYYYYYY found 0xXXXXXXXX". Do you think I could have defective hardware? I'm still curious why i get all these JTAG errors and why i cant connect to the terminal for debugging using "nios2-terminal". Thanks for all the help and I will be back in 5/31 trying to get this to work. If you have any other ideas let me know and I will give it a shot. Thanks again. 

-Jon
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Altera_Forum
Honored Contributor II
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to test if your enviroment works, you can make some small test 

( the ide flash programmer in the ide has some quirks, so we go the simple way by script)  

 

make a new directory 

copy some files into this directory 

 

(main path may differ in your installation) 

 

copy c:\altera\kits\nios2\nios2_sdk_shell.bat 

copy c:\altera\kits\nios2\components\altera_nios_dev_board_cyclone_1c20 

\system\altera_nios_dev_board_cyclone_1c20.sof 

copy c:\altera\kits\nios2\examples\factory_recovery 

niosII_cyclone_1c20\restore_cyclone_1c20.flash 

 

it's easier to copy the following command in a script file e.g. restore.sh and call it 

make a new file restore.sh and copy the following line in it (only one line) 

# start of script file 

nios2-flash-programmer --input=restore_cyclone_1c20.flash --sof=altera_nios_dev_board_cyclone_1c20.sof --device=1 --cable="USB-Blaster [USB-0]" --base=0x00800000# end of script file 

 

 

you now have a direcory with: 

 

nios2_sdk_shell.bat // the batch file to start the nios sdk shell 

altera_nios_dev_board_cyclone_1c20.sof // the flash programmer board file, only used by flash programmer  

restore_cyclone_1c20.flash // the original content of the flash on the board 

restore.sh // your simple shell script to program the flash file 

 

first call nios2_sdk_shell.bat with e.g. doppleclick 

then start your restore script with "sh restore.sh

 

you should see the following output: 

 

[SOPC Builder]$ sh restore.sh 

27.05.2005 23:29:22 - (INFO) nios2-flash-programmer: Launching Quartus Programme 

r to download: 

altera_nios_dev_board_cyclone_1c20.sof 

Pre-Reading 831KBytes of data from U5: 

|----.----+----.----| 

********************* (6.36 sec). 

Erasing 15 Sectors: 

|----.----+----.----| 

********************* (13.046 sec). 

Writing 960KBytes : 

|----.----+----.----| 

********************* (46.0 sec). 

Verifying 960KBytes of data: 

|----.----+----.----| 

********************* (6.75 sec). 

27.05.2005 23:30:38 - (INFO) nios2-flash-programmer: Success. Verified 960Kbytes 

written to U5. 

27.05.2005 23:30:38 - (INFO) nios2-flash-programmer: Flash programming complete 

/cygdrive/c/work/tttt 

[SOPC Builder]$ 

 

if this worked then your usb-balster and download is ok, if not then post the output please. 

 

 

if it worked then we can program e.g. the standard.sof from the standard design: 

 

copy c:\altera\kits\nios2\examples\vhdl\niosII_cyclone_1c20\standard\standard.sof 

 

we make a new script (e.g) (flash_standard.sh) 

 

enter the following lines into the script: 

# start of script file# first we must convert .sof -> .flash 

sof2flash --flash=U1 --input=standard.sof --output=standard.flash --offset=0x600000 --verbose --safe# now we can program the .flash 

nios2-flash-programmer --input=standard.flash --sof=altera_nios_dev_board_cyclone_1c20.sof --device=1 --cable="USB-Blaster [USB-0]" --base=0x00800000 

# end of script file 

 

call the script: sh flash_standard.sh 

 

you should get the following output: 

 

... 

[SOPC Builder]$ sh flash_standard.sh 

27.05.2005 23:58:52 - (FEIN) sof2flash: Starting 

Info: ******************************************************************* 

Info: Running Quartus II Convert_programming_file 

Info: Command: quartus_cpf --no_banner --convert standard.sof standard.rbf 

Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings 

Info: Processing ended: Fri May 27 23:58:53 2005 

Info: Elapsed time: 00:00:01 

27.05.2005 23:58:54 - (FEIN) sof2flash: Done 

27.05.2005 23:58:55 - (INFO) nios2-flash-programmer: Launching Quartus Programme 

r to download: 

altera_nios_dev_board_cyclone_1c20.sof 

Pre-Reading 434KBytes of data from U1: 

|----.----+----.----| 

********************* (2.89 sec). 

Erasing 7 Sectors: 

|----.----+----.----| 

********************* (3.985 sec). 

Writing 448KBytes : 

|----.----+----.----| 

********************* (21.343 sec). 

Verifying 448KBytes of data: 

|----.----+----.----| 

********************* (3.172 sec). 

27.05.2005 23:59:30 - (INFO) nios2-flash-programmer: Success. Verified 448Kbytes 

written to U1. 

27.05.2005 23:59:30 - (INFO) nios2-flash-programmer: Flash programming complete 

/cygdrive/c/work/tttt 

[SOPC Builder]$ 

 

if this also worked, the issue reset and start debugger again. 

 

good luck
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Altera_Forum
Honored Contributor II
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Thanks for the reply Fischer I will give that a try shortly. Do I have to specify an offset in the flash where the safe SOF file is going, i.e. the safe config space (offset of 0x700000)? is that already set since it is a .flash file already?  

 

Also, for the standard.sof should the --flash=U1 flag be --flash=U5 like the flash script generator?  

Thanks 

 

-Jon
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Altera_Forum
Honored Contributor II
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Fischer,  

I ran your script and had the same errors that Quartus II was giving me. here are three of them: 

 

[SOPC Builder]$ sh restore.sh 

May 31, 2005 10:46:28 AM - (INFO) nios2-flash-programmer: Launching Quartus Prog 

rammer to download: 

altera_nios_dev_board_cyclone_1c20.sof 

Error: Can't access JTAG chain 

Error: Quartus II Programmer was unsuccessful. 1 error, 0 warnings 

May 31, 2005 10:46:32 AM - (SEVERE) nios2-flash-programmer: Unable to download S 

OF: altera_nios_dev_board_cyclone_1c20.sof, exiting 

 

and 

 

[SOPC Builder]$ sh restore.sh 

May 31, 2005 10:46:04 AM - (INFO) nios2-flash-programmer: Launching Quartus Prog 

rammer to download: 

altera_nios_dev_board_cyclone_1c20.sof 

Error: Can't configure device. Expected JTAG ID code 0x020840DD for device 1, bu 

t found JTAG ID code 0x00000000. 

Error: Operation failed 

Error: Quartus II Programmer was unsuccessful. 2 errors, 0 warnings 

May 31, 2005 10:46:06 AM - (SEVERE) nios2-flash-programmer: Unable to download S 

OF: altera_nios_dev_board_cyclone_1c20.sof, exiting 

 

and 

 

[SOPC Builder]$ sh restore.sh 

May 31, 2005 10:46:37 AM - (INFO) nios2-flash-programmer: Launching Quartus Prog 

rammer to download: 

altera_nios_dev_board_cyclone_1c20.sof 

Error: Can't configure device. Expected JTAG ID code 0x020840DD for device 1, bu 

t found JTAG ID code 0xFFFFFFFF. 

Error: Operation failed 

Error: Quartus II Programmer was unsuccessful. 2 errors, 0 warnings 

May 31, 2005 10:46:39 AM - (SEVERE) nios2-flash-programmer: Unable to download S 

OF: altera_nios_dev_board_cyclone_1c20.sof, exiting 

 

 

usually the LEDs and 7-segment display turn off and the LCD stops scrolling. I will also ocassionaly get an error that says "java.exe has generated errors and will be closed by Windows. You will need to restart the program. An error log is being created." 

 

Any ideas? Is this a USB Blaster problem? thanks for all the help! 

 

-Jon
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Altera_Forum
Honored Contributor II
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I am a chinese's user 

I have the same problem. 

Error: Can't configure device. Expected JTAG ID code 0x020010DD for device 1, but found JTAG ID code 0xFFFFFFFF. 

I used the stratix 

This problem is occured after I programm the flash. 

I want to erase the flash .how can I do?
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Altera_Forum
Honored Contributor II
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Is it already solved?Please tell me. 

Thank you very much.
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Altera_Forum
Honored Contributor II
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The problem is solved.My USB blaster is corrupted.Use a new one and every thing is Ok!

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