Honored Contributor II
06-10-2018 11:19 PM
A FIFO shall feed data to the Nios II. As expected, it exposes q, rdreq and empty signals. These can be easily mapped to Avalon ST compatible signals by merely inverting empty signal to generate the Avalon ST valid signal.Now the question is, what do I do next so the Nios II Master can interface with this FIFO as if it was an Avalon MM slave? Certainly this shall require some sort of conversion between Avalon ST to Avalon MM as if the Nios II master was reading a FIFO inside the Qsys system. Is this possible?