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Hi all, I'm working on the CYCLONE 10 evaluation board with both external and internal RAM enabled: when I place the whole code/data only in internal or in external memory, all works fine.
Now I need to split the time critical code/data into internal memory, while the normal code/data need to be in external RAM due its size.
Unfortunately the suggestion showed in the NIOS SW developer handbook ("advanced placement options" chapter) doesn't works.
Can someone provide me some examples?
Thanks in advance
Maurizio
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Hi Maurizio,
May I know what was the error you got ?
You may need to verify if the memory section name is same as the one in your Nios II BSP or hardware.
Also, the __attribute__ must be placed in a function prototype.
Thanks.
Eric
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Hi, Maurizio
In your Platform Designer, have you checked whether there is an overlap of address range ?
Thanks.
Eric
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Hi, Maurizio
Is your problem resolved ?
Can you forward your linker and memory region of BSP to me ?
There could be address overlapping in address range.
Thanks.
Eric
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Hi, Maurizio
I didn't find any attachment. Can you forward your linker and memory region of BSP to me again by diagram or picture ?
Thanks.
Eric
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Hi, Maurizio
Your .myfastcode below is invalid, you need to put .rwdata, rodata or .text
“void handle_timer_interrupt(void* p) __attribute__ ((section (".RAM.myfastcode")));”
Can we close it if you have no more inquiry ?
Thanks.
Eric
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