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How to set the reset signal of Nios cpu?

Altera_Forum
Honored Contributor II
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Anybody know which pin should I connect to the reset signal of a Nios II cpu? 

The board I am using is "Stratix II EP2S60 DSP development board". 

 

Thanks a lot! 

 

Ruling
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Altera_Forum
Honored Contributor II
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Hi ruling, 

 

I think you can open any reference design relating to your board, and look for your information in 'Pin Assignment' Editor or 'Pin Plan' Editor. 

 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/tongue.gif
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Altera_Forum
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Thank you, David http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif  

 

 

--- Quote Start ---  

originally posted by david_cai@Jan 2 2006, 08:46 PM 

hi ruling, 

 

    i think you can open any reference design relating to your board, and look for your information in &#39;pin assignment&#39; editor or &#39;pin plan&#39; editor. 

 

http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/tongue.gif  

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=11891) 

--- quote end ---  

 

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Altera_Forum
Honored Contributor II
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PIN_AG19 

AG19 on Statix II High-Speed Dev. Board (EP2S60F1020-C3) is assigned to a Push Button. I&#39;m using Stratix II EP2S60 DSP Dev. Board, probably so does ruling. 

 

Where should be a formal datasheet referring this information for the specific board? 

 

thanks, 

 

 

--- Quote Start ---  

originally posted by ruling@Jan 2 2006, 09:41 PM 

thank you, david http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/smile.gif  

 

 

--- quote start ---  

originally posted by david_cai@jan 2 2006, 08:46 pm 

Hi ruling, 

 

    I think you can open any reference design relating to your board, and look for your information in &#39;Pin Assignment&#39; Editor or &#39;Pin Plan&#39; Editor. 

 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/tongue.gif  

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=11891) 

--- Quote End ---  

[/b] 

--- Quote End ---  

 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=11892)</div> 

[/b] 

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Altera_Forum
Honored Contributor II
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Another issue to consider is that when the CPU comes out of reset, all the other devices must be ready for the CPU. 

 

I&#39;ve added a delayed reset block before the CPU. This delays the CPU coming out of reset so that all the other devices are ready. 

 

Also be careful I found that the delayed resets included in eval boards did not work. 

 

George
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

originally posted by gmm50@Feb 28 2006, 03:53 PM 

another issue to consider is that when the cpu comes out of reset, all the other devices must be ready for the cpu. 

 

i&#39;ve added a delayed reset block before the cpu.  this delays the cpu coming out of reset so that all the other devices are ready. 

 

also be careful i found that the delayed resets included in eval boards did not work. 

 

george 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=12996) 

--- quote end ---  

 

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George:  

 

Would you mind expanding on your findings with resetting the NIOS II? I am having a problem now where I reset the NIOS II (actually, the whole SOPC system, as well as several components outside of the system) and the NIOS II refuses to restart. If you could let me know how much delay you are adding and anything helpful tips, I would be much obliged. 

 

Thanks, 

Brian
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