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I got following Error , HELP

Altera_Forum
Honored Contributor II
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I declare nios system on qsys and successfulyy generate it.When I Compile project , ı got following error ,please help me ...I am doing same as tutorial in terassic web page but ı could not achive system... 

 

 

Info: ******************************************************************* 

Info: Running Quartus II Analysis & Synthesis 

Info: Version 11.0 Build 157 04/27/2011 SJ Web Edition 

Info: Processing started: Sat Dec 03 19:11:23 2011 

Info: Command: quartus_map --read_settings_files=on --write_settings_files=off cpu -c cpu 

Warning: Parallel compilation is not licensed and has been disabled 

Info: Elaborating Qsys system entity "niosTest.qsys" 

Info: 2011.12.03.19:11:26 Progress: Loading nios/niosTest.qsys 

Info: NiosTest.onchip_memory2_0: Memory will be initialized from onchip_memory2_0.hex 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: add_interface_port: input not allowed for Direction, must be in {[Input, Output, Bidir]} 

Error: NiosTest.: set_parameter_property: system_info not allowed for  

 

"niosTest:inst|niosTest_onchip_memory2_0:onchip_memory2_0" 

Error: Can't elaborate user hierarchy "niosTest:inst|niosTest_onchip_memory2_0:onchip_memory2_0" 

Info: Generated suppressed messages file C:/Users/Aces/Desktop/nios/cpu.map.smsg 

Error: Quartus II Analysis & Synthesis was unsuccessful. 69 errors, 26 warnings 

Error: Peak virtual memory: 273 megabytes 

Error: Processing ended: Sat Dec 03 19:11:37 2011 

Error: Elapsed time: 00:00:14 

Error: Total CPU time (on all processors): 00:00:14
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