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I've declared a variable, but I'm trying to initialize it not with a# define, but rather a const variable. Something like:
const alt_u16 solid = 10; alt_u16 varState = solid; I though the compiler would put all 'const' variables in program memory, and therefore it should allow another variable to initialize itself with the const value... unfortunately, the compiler (9.1sp2) generates an error. Anyone know of a way to do this? I know I could just use a# define, but for type checking and debugging I prefer using constants. Thanks!Link Copied
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I'm not used to System Verilog and can't decide, if the said behaviour is an issue of the Quartus implementation or expectable by design. But System Verilog has also localparam for constants, that is accepted by Quartus in this case. The specification clarifies, that const is intended to be changed at simulation runstime.
P.S.: I noticed, that you aparently referred to C rather than System Verilog, although the behaviour is basically similar. In C, a const object is processed like a RAM variable, although it can't be written at runtime. So the compiler doesn't treat it as a constant value. I think, it's common to all C compilers.- Mark as New
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In addition, the const qualifier simply designates an object that is read-only. It can't be used in a constant expression, as required for an initializer by the ANSI C standard, but of course in a regular assignment.
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