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Nios V uC/TCP IP Failed

JLee25
Novice
3,063 Views

Hi support,

 

  I am learning the simple socket server design on Cyclone 10 GX.

For unknown reason, the initialization process stopped with the error code (2010),

JLee25_0-1710986007062.png

It's the TSE with DP83848.

The signals on MDIO and MDC is working.

Therefore I would like to know how to debug this issue.

Thank you.

BRs,

Johnson

 

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1 Solution
JingyangTeh
Employee
356 Views

Hi


Did you managed to run the example design on the Cyclone10 EVB yet?

Please note the following setting when trying to generate the BSP for the application.

5.5.2.2. Configuring the BSP (intel.com)


For the application you could reuse the application code from the latest design example.

https://www.intel.com/content/www/us/en/design-example/776159/intel-arria-10-fpga-simple-socket-server-for-the-nios-v-m-processor-design-example.html


Regards

Jingyang, Teh


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34 Replies
EBERLAZARE_I_Intel
2,433 Views

Hi,


This case just got routed to me today.


May I know your setup? Are you directly connecting the board to your PC? If yes, then you may need to disable the "DHCP feature (!DEF_TRUE)":

https://www.intel.com/content/www/us/en/docs/programmable/726952/23-4/configuring-mac-and-ip-addresses.html


Once you have set your IP address etc, rebuild the application and re-program the new .hex/.elf whichever you were using.


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JLee25
Novice
2,419 Views

Hello,

  It's a custom board with C10 GX and DP83848.

We use Nios II with NicheStack in the past and are porting the Niso V now.

 

So the Hareware should be fine.

The qsys connection is like below.

JLee25_0-1711526555057.png

The Nos V is running on EMIF.

Following your instruction, the socket is running now.

JLee25_1-1711526716453.png

But I can not connect to the server and ping to the specific is not responding..

Form the STP, the ff_rx_a_full is always high.

JLee25_2-1711526859065.png

I think there are problems on the FPGA side since the TSE IP is not responding..

 

BRs,

Johnson

 

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EBERLAZARE_I_Intel
2,407 Views

Hi,


Okay, we are moving in the correct direction, at least we can see what we can do next.


With the addresses now configure properly, and that the message “[sss_task] Simple Socket Server listening on port

<port number>” is displayed when the µC/TCP-IP Stack is ready for connection.


Can you show/screenshot on your Host PC's CMD, running below steps?:


After the µC/TCP-IP Stack is ready, you can start a telnet session to interact with the stack.


To start a telnet session, follow these steps:

1. From your operating system, open a command shell or a terminal.


Note: On Windows, you can also use Run on the Start menu.


2. Type the following command, specifying either the static IP address or the DHCPserver-provided IP address:


telnet <IP Address> <Port>


telnet 192.168.1.110 80


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JLee25
Novice
2,383 Views

Hi,

  I tried telnet and ping command.

 

But no reply from the server

JLee25_0-1711675771336.png

 

 

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EBERLAZARE_I_Intel
2,373 Views

Hi,


How is your setup? Does your computer (that is connected to the board) connected to a VPN or secure connection?


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JLee25
Novice
2,363 Views

Hi Eberlazare,

  No, just through a switch.

 

And I am debugging the qsys..

I can see the mii_rx_d to TSE.

But for unknown reason, the ff_rx_a_full going high and ff_rx_rdy goes low after the SSS starting.

 

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JLee25
Novice
2,343 Views

Hi,

 

  I think the problem is the TSE not responding for unknown reason after the SSS running...

 

I STP the signals between TSE RX and the RX MSGDMA.

The ff_rx_rdy going low and not returned to high.

JLee25_0-1711706917066.png

 

Perhaps something wrong on my Qsys setting or..

I feel the MSGDMA is not working and there's not much data about this IP..

I upload the QAR file for your analysis.

Thank you.

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JLee25
Novice
2,341 Views

Hi,

  Please use the attached QAR for analysis.

 

Thank you.

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EBERLAZARE_I_Intel
2,269 Views

Hi,


Thanks, I will check out the design.


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EBERLAZARE_I_Intel
2,267 Views

Hi,


What is the Quartus version that you are working on?


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JLee25
Novice
2,256 Views

 

I am using Quartus Prime Pro 23.2.0 in Win 10.

 

Thank you.

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EBERLAZARE_I_Intel
2,160 Views

Hi,


I may need some days to debug this issue, I shall update to you again in the next few days.


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EBERLAZARE_I_Intel
2,010 Views

Hi,


From my findings, the signal issue you mentioned, it seems that it has something to do with some settings that need to be tweaked.


I will further investigate towards that and get back to you soon with some suggested workaround.


Thanks for your patience.


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EBERLAZARE_I_Intel
1,861 Views

Hi,


Does the issue always have the "ff_rx_rdy" high? OR do you have it work at random times?


One of the workaround I could find was implementing a reset. I am not that familiar with the TSE IP, you could try to perform a reset signal:

https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/clock-and-reset-signals.html


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JLee25
Novice
1,855 Views

Hi,

  From the STP content below, I think the ff_rx_rdy is a signal from DMA.

JLee25_0-1713146164029.png

 

After downloading the sof and elf, the system booted with ff_rx_rdy high, which indicate to the core ready to receive data.

But it went low after with the network connected.. 

Therefore I guess there are problems on the msgdma ..

I read back some register settings on TSE core, and thought it should be configured correctly.

JLee25_1-1713146795004.png

 

 

 

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JLee25
Novice
1,809 Views

Hi,

  I modify the design with Nios V to EMIF through a memory mapped clock crossing bridge and DMA through another bridge.

JLee25_0-1713245949919.png

 

But for unknown reason the DMA bridge is not running...

I STP the bus and found only Nios V is running..

JLee25_1-1713246110902.png

Any suggestions ? DMA driver or ...

 

 

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EBERLAZARE_I_Intel
1,748 Views

Hi,

 

Is the DMA & EMIF visible in the "drivers" tab in BSP-editor?

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JLee25
Novice
1,747 Views

Hi,

  I believe so, as

JLee25_0-1713343736929.png

and

JLee25_1-1713343785540.png

JLee25_2-1713343818698.png

 

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EBERLAZARE_I_Intel
1,515 Views

Hi,


Since we currently do not have the example for the Simple Socket Server with EMIF for Nios V, can you try with the OCRAM as per the Nios V handbook?:

https://www.intel.com/content/www/us/en/docs/programmable/726952/23-4/processor-using-the-microc-tcp-ip-stack.html


Try with OCRAM, if it works then I can recommend to try with EMIF.


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JLee25
Novice
1,458 Views

Hi,

  I tried OCRMA before EMIF and it's not working for unknown reason.

 

I upload the QAR for your reference.

The STP content is the same as EMIF...

JLee25_0-1713867397077.png

 

 

Perhaps some components are with wrong settings..

 

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