Quartus-II - Slow Slew Rate

Altera_Forum · ‎06-28-2005

I see there is a global "slow slew rate" option.

Is it possible to turn it on for individual pins, using Tcl scripting? If so, how?

If not, I guess I could turn it on globally; how much would I need to adjust timing for memory devices? (IOW - What is the difference in slew rate between "fast" and "slow"?)

Altera_Forum · ‎06-28-2005

Hi Jason,

You can do this in Quartus with the assignment editor:

Assignments->Assignment Editor menu item

Category: Logic Options: I/O Timing

Then:

"To" column: select the pin (you can do this via Node Finder)

"Assignment Name" column: Slow Slew Rate

Regards,

--Scott

Altera_Forum · ‎06-28-2005

Thanks Scott.

Turning on "slow slew rate" didn't make much of a difference.

I explored a bit further and discovered the current limit control - Assignment Editor - Logic Options - I/O Features - Assignment Name "Current Strength" - Value "Minimum Current".

The "output pins" section indicates the current limit changed to 4mA (was 24mA).

Using this reduced signal products around 50-100 MHz by 3dB.

Slugging the output pin with 33pF further reduced those signal products by a further 3dB, and "eradicated" those above 100MHz. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif