To change external memory access time?

[Altera_Forum]

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  http://www.alteraforum.com/forum//images/icons/icon1.gif to change external memory access time?  Hello,  I have a board with Nios using external SRAM built in two flavors: the one is fast 10ns SRAM the other is a battery-backed 70ns SRAM. The boards will have different software to work on each build.  My goal is to have both boards configured with the same FPGA file.  Is there a way to configure a tristate slave with 70ns access time and than change this access time to 10ns from the software somehow?  My code loads from flash memory to SRAM and executes from SRAM.  Any ideas? Hello,  I have a board with Nios using external SRAM built in two flavors: the one is fast 10ns SRAM the other is a battery-backed 70ns SRAM. The boards will have different software to work on each build.  My goal is to have both boards configured with the same FPGA file.  Is there a way to configure a tristate slave with 70ns access time and than change this access time to 10ns from the software somehow?  My code loads from flash memory to SRAM and executes from SRAM.  Any ideas?

[Altera_Forum]

You will need a custom HDL block for this, since the tristate bridge is not software configurable. A custom HDL block would not be that difficult and you could program the access time via a configuration register. Good luck.