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ec
Beginner
395 Views

CPUID(EAX=7,ECX=0).EDX[13] is not documented

On a Core i5-9500 with CPUID signature 906ea, i.e. Coffee Lake, CPUID(EAX=7,ECX=0) Returns with bit 2000h set in EDX, which is neither documented in the PDFs available from

https://software.intel.com/en-us/articles/intel-sdm

and
https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
nor the article

https://software.intel.com/security-software-guidance/insights/deep-dive-cpuid-enumeration-and-archi...

So: where's CPUID(EAX=7h,ECX=0).EDX[13] documented.

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Sebastian_M_Intel
Moderator
379 Views

Hello ec, 

 

Thank you for posting on the Intel® communities.   

 

The information that you are looking for is most likely provided in some other Intel® support sites, so we can have more information about this, please clarify the following: 

 

  • Are you modifying or creating a new hardware or software? Please provide a brief explanation if yes. 
  • What piece of information exactly are you looking for? Do you have any reference? 
  • Also, why do you need this information for? Would it be for a specific software/hardware design? Please explain.  

 

Regards, 

 

Sebastian M  

Intel Customer Support Technician  


ec
Beginner
370 Views

0. "Most likely" is where? This Information is missing from the OFFICIAL processor Manuals.

1. No

2. The documentation for bit 2000h of EDX, as returned by CPUID when called with EAX=7 and ECX=0 (that's what the subject already says).

   Reference: any current processor. See https://community.intel.com/t5/Intel-Software-Guard-Extensions/Cannot-use-cpuid-to-find-the-status-o... for example

3. To decode the output of CPUID

HadiBrais
New Contributor III
361 Views

It indicates whether the TSX_FORCE_ABORT MSR is supported or not. This is documented by Intel in the white paper tilted "Performance Monitoring Impact of Intel® Transactional Synchronization Extension Memory," which you can find here. It seems that Intel has forgotten to update the SDM Volume 2 to describe this bit. Although it's described in Wikipedia's CPUID page.

ec
Beginner
354 Views

Thanks.

Intel also forgot to add SRBDS_CTRL in volume 2.

This, plus L1D_FLUSH, "last branch records" and yet another flag were also missing in Wikipedia.

Sebastian_M_Intel
Moderator
345 Views

Hello ec, 

 

Thank you for the information. 

 

The support for this is indeed provided through the Intel® Developer Zone: https://software.intel.com/en-us/support           

                                                      

Since you mentioned that this information is missing here, this will require a closer look by an Intel Field Application Engineer (FAE). 


If you have your own Intel representative, you may want to inquire if they can assist you with this missing details on the documentation. Your company's Purchasing Department will normally have your Intel representative's contact information (if that is the case). If you do not have a contact, you may want to speak with a Field Application Engineer from a local distributor to see whether they are able to help. A list of Intel® Authorized Distributors can be found here:

https://www.intel.com/content/www/us/en/products/find-a-reseller.html

 

Regards, 

 

Sebastian M  

Intel Customer Support Technician  


Sebastian_M_Intel
Moderator
335 Views

Hello ec,


I hope our previous recommendation was useful to you.


We would proceed to close this inquiry, please remember to check with the Authorized Distributors to get further help from a FAE (if you already have one, contact them directly).


If you have further questions please submit a new post as this one will no longer be monitored.


Regards, 

 

Sebastian M 

Intel Customer Support Technician   


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