Computer Engineering flaw :: TLB and Cache

[idata]

Is there a valid ROI on Level 1, 2, 3 cache and TLBs (which is not easy to know).

More general purpose registers could be pragmatically sound.

[Adolfo_S_Intel2]

I would suggest contacting a Field Application Engineer (FAE) so they can assist you with your question.

You can contact a Field Application Engineer (FAE) by calling any of the Authorized Intel® Distributors and asking them to put you in contact with a FAE.

You can find a list of Authorized Intel® Distributors at:

http://www.intel.com/cd/channel/reseller/asmo-na/eng/227304.htm http://www.intel.com/cd/channel/reseller/asmo-na/eng/227304.htm

If you are outside of North America, please check this link for a list of local Authorized Intel® Distributors:

http://premierlocator.intel.com/Default.aspx http://premierlocator.intel.com/Default.aspx

[idata]

Your reply was so irrelevant. Please give any reason why a F.A.E. has to do with computer engineering and TLB/cache ? And why did you suggest and tell me to contact them.

Any how, Level 1-4 Cache may be of use if CPU or what I call it is General Processing Unit has different parts connected to it and there is a chip that stores buffer on it and if enhanced it would be cache/TLB.

For example, keyboard should have it. Keyboard buffer or cin and flush.

cout << flush to for display adapters on different ECE equipment.