Tiger Lake UP3 1186-GRE - OPI bus Error monitoring

[hamedghorbani]

Hi,

I am interested in monitoring errors on the OPI bus between TGL and the PCH on the 1186-GRE.

Is there a dedicated register to monitor this internal bus?

Thanks

[NormanS_Intel]

Hello hamedghorbani,

Thank you for posting in our Intel Community!

I see that your query pertains to the Intel® Core™ i7-1186GRE Processor. To ensure you receive the most informed and specialized support, I will be transferring this discussion to our Embedded Products forum.

Best regards,

Norman S.

Intel Customer Support Engineer

[Diego_INTEL]

Hello @hamedghorbani,

Thank you for contacting Intel Embedded Community.

You may try checking the EDS Vol2 from the PCH, document #575857:

34.1.12 Root Error Command (REC)—Offset 20ACh

And for Tiger Lake U, EDS Vol2, document #575681.

3.1.4 PCI Command (PCICMD_0_0_0_PCI) — Offset 4h

3.1.41 Capabilities B (CAPID0_B_0_0_0_PCI) — Offset E8h

3.3.17 System Agent Performance Status
(SA_PERF_STATUS_0_0_0_MCHBAR_PCU) — Offset 5918h

Best regards,

@Diego_INTEL