computer architecture ( RISC vs CISC )

[Raya_R]

RISC : means reduced instruction ( more ) but each one is simple so its time complexity considered to be few compared to CISC  , so for eg. to perform the following exp. A=B+C  using : 

RISC pattern :

load R1 , B 

load R2 , C

add R3,R1,R2

store R3,A  

==>(pseudocode)

using : CISC 

directly :

add A,B,C 

so the question is since both patterns gave the same output at the end b+c will be stored in a , 

but the difference that # of used instructions , but why also the time complexity is not the same ( as I have mentioned above ( definition ) ) since add A,B,C will be simplified into simple instructions as in RISC ( this will happen implicitly for the dev. ) so the time must be the same ?? 

summary : pseudocode of RISC === pseudocode of CISC , so the time at the end must be the same ? 

[AlHill]

What is your point?  Thirty years ago, this would have been an interesting discussion.

Doc (not an Intel employee or contractor)
[W10 is today's XP ]

[Raya_R]

my question is : why we say that the time complexity in RISC is fewer than in CISC , since at CISC the complicated instruction at the end will be simplified into simple instructions as the ones in RISC ?  

[AlHill]

Not a question that will be answered here.  This is a technical support forum for Intel products.

You can take your academic question back to the classroom and ask the instructor.

Doc (not an Intel employee or contractor)
[W10 is today's XP ]

[windows_guru]

Modern processors are dramatically more powerful than the old RISC approach which was a cheaper CPU design. The RISC CPU used far less microcode to save on design cost.

AMD64 which both Intel and AMD share also are dramatically richer in capabilities. Skylake is the 4th gen 64-bit architecture which is now going on since my Dell 3050 micro PC box with its i3-6100 CPU. I have pondered an i5 CPU to have 4 cores which gets rid of hyperthreading.