AHDL to VHDL

[Altera_Forum]

Hi have ahdl code i want to convert it to vhdl code how?  

can any one help me please thanx

[Altera_Forum]

Either manually re-write it 

or download the Xport file from Xilinx - you may how to download the entire ISE tool.

[Altera_Forum]

--- Quote Start ---  Either manually re-write it or download the Xport file from Xilinx - you may how to download the entire ISE tool.  --- Quote End ---    I have the Xilinx but I do not know how to download the Xport, and how to use it because I new for Xilinx or Quartus II so please can you help me

[Altera_Forum]

this is cod in AHDL i have some error can please help me to solve the error. 

  SUBDESIGN with_ped_1 ( clk,reset : INPUT; t1, t10, t5, t3, p, A : INPUT;   Mg, My, Mr, Fg, Fy, Fr, t1_enl, t5_enl, t10_enl, p_g, p_r, t3_enl : OUTPUT; ) VARIABLE ss: MACHINE WITH STATES (s0, s1, s2, s3, s4, s5, s6, s7, s8, s9); BEGIN ss.clk = clk; ss.reset = reset; TABLE %current current current next% % state input output state%    ss, t1, t10, t5, t3, p, A => Mg, My, Mr, Fg, Fy, Fr, t1_enl, t5_enl, t10_enl, t3_enl, p_g, p_r, ss;  s0 x,0,x,x,x,x => 1,0,0, 0,0,1, 0,0,1,0, 0,1, s0;  s0 x,1,x,x,1,x => 1,0,0, 0,0,1, 0,0,1,0, 0,1, s1;   s0 x,1,x,x,0,0 => 1,0,0, 0,0,1, 0,0,1,0, 0,1, s0;   s0 x,1,x,x,0,1 => 1,0,0, 0,0,1, 0,0,1,0, 0,1, s6;     s1 1,x,x,x,x,x => 1,1,0, 0,0,1, 1,0,0,0, 0,1, s2;   s1 0,x,x,x,x,x => 1,1,0, 0,0,1, 1,0,0,0, 0,1, s1;     s2 x,x,x,0,x,x => 0,0,1, 0,0,1, 0,0,0,1, 1,0, s2;  s2 x,x,x,1,x,0 => 0,0,1, 0,0,1, 0,0,0,1, 1,0, s7;   s2 x,x,x,1,x,1 => 0,0,1, 0,0,1, 0,0,0,1, 1,0, s3;     s3 0,x,x,x,x,x => 0,0,1, 0,1,1, 1,0,0,0, 0,1, s3;   s3 1,x,x,x,x,x => 0,0,1, 0,1,1, 1,0,0,0, 0,1, s4;     s4 x,x,0,x,x,x => 0,0,1, 1,0,0, 0,1,0,0, 0,1, s4;   s4 x,x,1,x,0,x => 0,0,1, 1,0,0, 0,1,0,0, 0,1, s5;   s4 x,x,1,x,1,x => 0,0,1, 1,0,0, 0,1,0,0, 0,1, s8;     s5 0,x,x,x,x,x => 0,1,1, 1,1,0, 1,0,0,0, 0,1, s5;   s5 1,x,x,x,x,x => 0,1,1, 1,1,0, 1,0,0,0, 0,1, s0;     s6 0,x,x,x,x,x => 1,1,0, 0,1,1, 1,0,0,0, 0,1, s6;   s6 1,x,x,x,x,x => 1,1,0, 0,1,1, 1,0,0,0, 0,1, s4;     s7 0,x,x,x,x,x => 0,1,1, 0,0,1, 1,0,0,0, 0,1, s7;  s7 1,x,x,x,x,x => 0,1,1, 0,0,1, 1,0,0,0, 0,1, s0;    s8 0,x,x,x,x,x => 0,0,1, 1,1,0, 1,0,0,0, 0,1, s8;   s8 1,x,x,x,x,x => 0,0,1, 1,1,0, 1,0,0,0, 0,1, s9;    s9 x,x,x,0,x,x => 0,0,1, 0,0,1, 0,0,0,1, 1,0, s9;   s9 x,x,x,1,x,x => 0,0,1, 0,0,1, 0,0,0,1, 1,0, s7;  END TABLE; END;