Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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About unused pins

Altera_Forum
Honored Contributor II
‎06-25-2009 11:42 AM
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I'd like to know how to configure StratixIII I/O pins which are connected on a board to gnd, vcc, or to incoming signals from anothers components, which are not used by the fpga. 

 

Have I to create input pins in the design for these unused pins, connect them to gnd/vcc, and define the incoming voltage? Or can I delete these pins in the design and select "reserve all unused pins as input tri-state with pull-up resistor"?  

 

Can you confirm that these 2 solutions are safe and appropriate? 

Thanks, 

Francois
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