Compatibility of compiled design.

[Altera_Forum]

Hi, 

 I want to know if it is possible and save to use a Design compiled for a FPGA with commercial Temperature-Range and lower Speed-Grade in a FPGA with industrial Temperature-Range and lower Speed-Grade.  or else:  Can I use a design compiled for an EP4CGX50CF23c8 in an EP4CGX50CF23i7?  I think it is better to compile it again, but we have extremely tested the design and it works just perfect. When we compile it again, we have to do the whole testing-cycle again. Is it a must to compile again?  Thanks Steffen

[Altera_Forum]

As far as I know, the only differences between the parts are that the I parts passed stricter quality control. They all come from the same wafers.  

the C parts will have worse timing specs, so something that passes on a C part should be fine on an I part.

[Altera_Forum]

Hmmm, seems that even pros didn't ever check this ;-). 

Well, I think I have to verify this by my own. I'll post the result here.

[Altera_Forum]

As long as you have correctly constrained your design there won't be any problems. Timequest always use the delays of the fastest variant of the FPGA for hold requirements, even when you compile the design for a slower part, so the design will always work on a faster FPGA that what it was compiled for.

[Altera_Forum]

--- Quote Start ---  As far as I know, the only differences between the parts are that the I parts passed stricter quality control. They all come from the same wafers.  the C parts will have worse timing specs, so something that passes on a C part should be fine on an I part.  --- Quote End ---    Compilation result is different between a commercial and an industrial Temperature-Range (same Speed-Grade).  I had compiled the same design for an EP4CGX50CF23c7 and an EP4CGX50CF23i7.  The design compiled for the c part work fine on the i part.  But for the same design compiled for the i part, our application showed issues running on target (i part) !!  How can you explain this difference ?  Thanks Srevault