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Cyclone III AS configuration problem (yes another)

Altera_Forum
Honored Contributor II
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First thanks for all you experts who answers posts... 

If I become and expert I will answer some myself. 

I am having similar difficulties as others with AS configurations. Here is what I have done and I am still unable to get my FPGA design to configure via an AS EPCS4 device. 

AS device in circuit programming design copied from existing working design. 

Design verified from Cyclone III device handbook, Chapter 9 Configuration, Figure 9-7, page 9-22  

MSEL 0, 1, 2 verified correct (0,1,0) 

Proper 10k pullups verfied on nSTATUS, CONF_DONE, nCONF, 

Proper 10k Pulldown on nCE 

25 ohm resistor in series with DATA[0] (tried 0 ohms also) 

EPCS4 configuration device swapped 

Cyclone III swapped 

oscope shot of nCONFIG, nSTATUS, DCLK, DATA included 

100 us pulses on nSTATUS 

Quartus programer via byte blaster cannot recognize device ID 

Failure on two board revs, 3 each rev, total of six prototypes will not configure  

All boards programmable VIA JTAG 

help?
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Altera_Forum
Honored Contributor II
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Your report is unclear. It's apparently mixing AS device programming and configuration problems. Obviously, the AS configurations device must be programmed and verified correctly before you can expect it to configure the FPGA succesfully. 

 

If the programmer can't access the AS device, there seems to be a hardwarwe problem in your design which must be fixed first. 

 

Apart from programming the AS configuration device, you can do it also through JTAG indirect programming. Did you notice?
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Altera_Forum
Honored Contributor II
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My report included all details not necessarily in order. It is probably confusing to read. I am able to program using JTAG. I am aware that JTAG ignores the msel pins and I most likely have a hardware problem that is causing the FPGA not to enter Active Serial programing mode after POR. I just don't know how to proceed any further or what to look for. 

Notice that nSTATUS from the scope trace is toggling. I saw a few other posts where this has happened to people I looked at what they did and it did not help my situation. 

Thanks for looking at my post, any suggestions?
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Altera_Forum
Honored Contributor II
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Also I did try to program the AS device via usb blaster with Quartus II. That is where I get the device not recognized error. 

I have another board that I can program the AS device on so I know I am ok on that end. 

Thanks
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Altera_Forum
Honored Contributor II
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I see what you are saying, I have two separate issues 

1. Programming the AS device 

2. The FPGA reading the AS device. 

I will work on getting the AS device programmed first then worry about the FPGA getting into AS mode.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I will work on getting the AS device programmed first then worry about the FPGA getting into AS mode. 

--- Quote End ---  

 

Yes, that's my point. 

 

Of course, you are also able to determine if the FPGA is trying to read the configuration device or not. But the oscillscope must be set to µs/div to see what happens after rising edge of NCONFIG.
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Altera_Forum
Honored Contributor II
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What are your power supplies like, are they up to the job? 

 

There is an inrush current on VccInt (on some devices) which can be >> normal operating current. If your supplies aren't up to this it might be  

causing what you're seeing. 

 

Also, how far away is the config device to the FPGA? Controlled impedance tracks?  

Tracks with associated ground planes not crossing slots?  

No long parallel tracks that could be coupling crosstalk? 

 

I always place the config device and the JTAG header as close to the FPGA as possible (all else considered) on the assumption that reliable 

configuration's the first step to producing a reliable board! 

 

I'm also almost exclusively using JIC config from the JTAG header. This usualy allows shorter tracks all round. 

 

 

Nial.
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