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Cyclone IV IO bank power sequencing

Altera_Forum
Honored Contributor II
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I have a Cyclone IV device as a managment device for the balance of circuitry on a board. The FPGA comes up prior to much of the rest of the board being powered. The FPGA will be responsible for sequencing the power up of various other power rails for other devices on the board. The majority of the FPGA's I/O will need to run at 3.3V 

 

The FPGA must also communicate with other devices once they come alive, devices that operate at 1.8V. 

 

To negate the need for dedicated 1.8V power supplies for the FPGA I would like to use the same 1.8V PSU that powers the other devices - a power supply that the FPGA is responsible for switching on. 

 

So, one (or more) banks of the FPGA would remain off until that same FPGA switches the rail on, powering the other circuitry and its own I/O bank. This would typically be within a second of the 3.3V rail coming up, but could conceivably be (in a fault condition) considerably longer - or never. 

 

Providing I power the appropriate I/O banks required for configuration immediately, can I sequence other banks at such intervals? Can I rely on the device booting? 

 

The handbook tells me the POR circuitry monitors VCCINT, VCCA and 'the VCCIO level of I/O banks that contain configuration pins'. For that reason, can I assume an FPGA, connected as I intend, will boot?
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Altera_Forum
Honored Contributor II
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I have not tried partially powering up Cyclone IV I/O banks. A quick search through the handbook (May 2013) shows the comment that you found on p168 of the PDF. 

 

It does appear from that comment, and from others through the handbook that if you power a single bank at 1.8V, that so long as that bank does not have any configuration pins, you can power it up later. 

 

I believe the DE-115 has jumpers for setting the I/O power, so if you had one of those, you could try powering up that board with an I/O jumper missing to see if it powered ok. 

 

How much 1.8V current is required for the other devices on the board? 

 

An alternative method to sequence the FPGA power, is to power-up the 1.8V supply with all the other FPGA power supplies, and use a power-switch to turn power on/off to the other 1.8V logic. Texas Instruments has a whole series of these types of devices. The nice thing about these power switches is that they have soft-start, so you can ramp up the power to your 1.8V logic nicely. 

 

For example, a quick search on TI's site yields this part: 

 

http://www.ti.com/product/tps22945 

 

for up to 100mA loads. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Hi Dave, thanks for your thoughts. 

 

I have a DE2-115 dev board. However, whilst the jumpers for the bank voltages can be removed, that doesn't disconnect power from the associated bank. It simply sets it to a default value - 3.3V. 

 

I do have an alternative board that I could try this on. Given the hot swap features Altera promote with this family I would expect this to work. However, there is a difference between it working on a few boards and Altera clearly stating that this is a supported feature of Cyclone IV devices. 

 

I do like your suggestion of using some form of power switch for different portions of circuitry. The only hurdle here is the on resistance of such a switch. The one you've identified is not up to my requirements (possibly up to 1Amp). However, the principle is good. A P-channel FET with a low on resistance may suffice. 

 

It may also be possible to boost the 1.8V rail a little such that any voltage drop through the high side FET is negated and the other circuitry remains within spec (+/-5%). The Cyclone IV would be happy to operate at 1.8V+5%. 

 

Cheers
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Altera_Forum
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--- Quote Start ---  

 

I do like your suggestion of using some form of power switch for different portions of circuitry. The only hurdle here is the on resistance of such a switch. The one you've identified is not up to my requirements (possibly up to 1Amp). However, the principle is good. A P-channel FET with a low on resistance may suffice. 

 

It may also be possible to boost the 1.8V rail a little such that any voltage drop through the high side FET is negated and the other circuitry remains within spec (+/-5%). The Cyclone IV would be happy to operate at 1.8V+5%. 

 

--- Quote End ---  

 

 

Don't be afraid to use two regulators; the one for the FPGA could be a linear drawing a <100mA, whereas the 1A could use a switcher. 

 

Cheers, 

Dave
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