Cyclone V SoC AHB BUS

[Altera_Forum]

Hi 

 I need an AHB bus outside the hps with qsys. The HPS has an h2f_axi_master and f2h_axi_slave_bridge. The qsys interconnect guide is not helpful :cry:.. some idea where to start? some examples? or something else ?  thanks

[Altera_Forum]

--- Quote Start ---  Hi  I need an AHB bus outside the hps with qsys. The HPS has an h2f_axi_master and f2h_axi_slave_bridge. The qsys interconnect guide is not helpful :cry:.. some idea where to start? some examples? or something else ?  thanks  --- Quote End ---    Hi,  AHB is not equal with AXI interface. AHB is between HSP-FPGA bridges for example. The signals you mentioned are AXI interface signals. For details see the Cyclone V SoC Handbook: http://www.altera.com/literature/hb/cyclone-v/cyclone5_handbook.pdf  For reference design which contains HPS integrated with some FPGA slave peripherals here (called Golden HW/SW reference design - ghrd/gsrd): <altera_installation_directory>\13.0sp1\embedded\examples  This FW design uses LW HPS2FPGA bridge, but easily can be replaced with high-speed HPS2FPGA bridge connected to a BRAM on FPGA side. ZS.V. 

[Altera_Forum]

Qsys only supports the following protocols: 

 Avalon-MM v2 Avalon-ST AXI v1 (aka AXI3) AXI v2 (aka AXI4) APB v1 (aka APB3)

[Altera_Forum]

In Qsys there are some Interconnect components. I use the golden system reference design. Maybe I can use this components to convert AXI to avalon ST(AXI Master Network interface) and from avalon st to AHB (AHB Slave agent).  

 In Qsys: HPS(AXI MASTER)-->AXI MASTER NETWORK INTERFACE-->AHB SLAVE AGENT-->AHB SLAVE  The axi network interface converts AXI to qsys packets(avalon st) and has in qsys following signals  (write_cp, write_rp, read_cp, read_rp, altera_axi_slave)  ahb slave agent : (altera_ahb_master, rp, cp  Can I use this two components to convert AXI to AHB?   There are any informations from altera about connecting different bus types? How are the convertion beetween AXI and APB is done? (e.g. AXI Master and i want to connect an APB slave) Any available 3rd party ip cores to convert an AXI to AHB?   thanks a lot

[Altera_Forum]

I googled "AXI to AHB" and found a lot of solutions, here is one from OpenCores.org: http://opencores.org/project,robust_axi2ahb 

 The NOC that Qsys builds uses an archeticture resembling this:  Slave IP <-- translator <-- agent <-- limiter <-- switch <-- limiter <-- agent <-- translator <-- Master IP  If you instantiate just the agent by itself you might be missing pieces of what you need. Are you trying to integrate a bunch of AHB based IP or just one? If it's just one then throwing an AXI to AHB wrapper around the IP should be fairly straight forward. If you have many IP then exporting an AXI interface to the top and handling the adaptation outside of the system might be appropriate. Even if you have multiple AHB IP to integrate, putting wrappers around them to adapt them over to AXI might be the better approach because then you don't have to worry about implementing connectivity between the IP yourself.  To answer your last question the heart of the NoC is generic and doesn't care about the protocol. It's the translators and agents that are protocol aware so there is a pair of those cores for Avalon-MM, AMBA AXI, AMBA APB. So in the case of an AXI master connecting to APB slave it's connected through AXI aware fabric cores on one side and APB aware fabric cores on the other. If you add Avalon-MM into the mix the same thing occurs. As long as your IP has a supported interface the tools take it from there and handle the fabric integration for you and that's why I'm suggeting wrapping your IP with AHB to AXI conversion logic so that you can take care of the interface and let the tools handle the rest.