Cyclone V SoC Reset Manager necessity

[Smith222122]

Hello,

I am attempting to develop a board around the Cyclone V SoC. I do not plan on using/ instantiating the HPS in my design. Therefore, I will not have the reset manager.

If I place my reset on the nPOR pin does the Reset Manager have to be used to place the reset signal into the FPGA fabric? If yes, then is there a different pin that I can use to only reset the FPGA fabric that will also initiate a reconfiguration from an EPCQ Active serial device upon reset?

I don't want to have to instantiate the HPS, but if its the only way I can get a reset into the FPGA fabric that also triggers a reconfiguration from the EPCQ device I will.

Thank you

[sstrell]

It's strange that you're using an SoC device on your board but not using the HPS, but to answer your question, you can treat the device just like any other FPGA if you don't use the HPS.  You don't need the reset manager or any other aspects of the HPS to use the basic FPGA functionality.

[Jeet14]

Hi,

Its is recommended to use the FPGA device when HPS is not required/used.

For reset requirement for Cyclone V, please refer the below link-

https://www.intel.com/content/www/us/en/docs/programmable/683884/20-3/reset-requirements-for-and-variations-29321.html

Regards

Tiwari

[Jeet14]

Hi,

Let me know if you have any query on this.

Regards

Tiwari