Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20713 Discussions

EMIF DDR4 STRATIX 10 ,QUARTUS PRIME PRO 20.1

VenkateshK
Novice
1,747 Views

Hi, I have Generated example design for emif stratix 10 and simulation scripts too. While simulating in the modelsim ,every signal has  default values only. even calib_success&fail both were low only!

 

one more thing ,I have generated emif core. With Avalon bus signal I am trying to feed some data,in this case aslo calibration is not going high.

0 Kudos
22 Replies
VenkateshK
Novice
201 Views

Sir, thank you so much for your support ,I Have simulated till 150,00,000 ps. Now I understood that It takes morethan 300,000,000 ps

I will simulate that again  and update you.

 

 

while testing emif on custom card I am facing some issues:

 

please have a look

community.intel.com/t5/Programmable-Devices/EMIF-DDR4-STRATIX-10-QUARTUS-PRIME-PRO-20-1/m-p/1351933#M82936

 

0 Kudos
AdzimZM_Intel
Employee
198 Views

Hi K Venkatesh,


Are you referring to this user guide when implementing the design?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20120.pdf


I'm not able to provide the code to replace the Traffic Generator.


Regards,

Adzim


0 Kudos
Reply